drm/amdgpu/vce4: alloc mm table for MM sriov
authorXiangliang Yu <Xiangliang.Yu@amd.com>
Tue, 7 Mar 2017 08:40:55 +0000 (16:40 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:55:11 +0000 (23:55 -0400)
Allocate MM table for sriov device.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

index 21a86d8..b1b887e 100644 (file)
@@ -294,6 +294,21 @@ static int vce_v4_0_sw_init(void *handle)
                        return r;
        }
 
+       if (amdgpu_sriov_vf(adev)) {
+               r = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
+                                           AMDGPU_GEM_DOMAIN_VRAM,
+                                           &adev->virt.mm_table.bo,
+                                           &adev->virt.mm_table.gpu_addr,
+                                           (void *)&adev->virt.mm_table.cpu_addr);
+               if (!r) {
+                       memset((void *)adev->virt.mm_table.cpu_addr, 0, PAGE_SIZE);
+                       printk("mm table gpu addr = 0x%llx, cpu addr = %p. \n",
+                              adev->virt.mm_table.gpu_addr,
+                              adev->virt.mm_table.cpu_addr);
+               }
+               return r;
+       }
+
        return r;
 }
 
@@ -302,6 +317,12 @@ static int vce_v4_0_sw_fini(void *handle)
        int r;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       /* free MM table */
+       if (amdgpu_sriov_vf(adev))
+               amdgpu_bo_free_kernel(&adev->virt.mm_table.bo,
+                                     &adev->virt.mm_table.gpu_addr,
+                                     (void *)&adev->virt.mm_table.cpu_addr);
+
        r = amdgpu_vce_suspend(adev);
        if (r)
                return r;