arm64: dts: broadcom: bcmbca: Add spi controller node
authorWilliam Zhang <william.zhang@broadcom.com>
Tue, 7 Feb 2023 06:58:15 +0000 (22:58 -0800)
committerFlorian Fainelli <f.fainelli@gmail.com>
Tue, 14 Mar 2023 21:06:52 +0000 (14:06 -0700)
Add support for HSSPI controller in ARMv8 chip dts files.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
14 files changed:
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts

index eb2a78f..fc96ee7 100644 (file)
                        clock-frequency = <50000000>;
                        clock-output-names = "periph";
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        soc {
                        #size-cells = <0>;
                };
 
+               hsspi: spi@1000{
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                nand-controller@1800 {
                        #address-cells = <1>;
                        #size-cells = <0>;
index d5bc319..46aa8c0 100644 (file)
@@ -79,6 +79,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
                #size-cells = <1>;
                ranges = <0x0 0x0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1";
+                       reg = <0x1000 0x600>, <0x2610 0x4>;
+                       reg-names = "hsspi", "spim-ctrl";
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;
index 6f80526..7020f2e 100644 (file)
@@ -60,6 +60,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
                #size-cells = <1>;
                ranges = <0x0 0x0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;
index b982249..6a0242c 100644 (file)
@@ -79,6 +79,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        psci {
                #size-cells = <1>;
                ranges = <0x0 0x0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;
index a996d43..1a12905 100644 (file)
@@ -79,6 +79,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
                #size-cells = <1>;
                ranges = <0x0 0x0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1";
+                       reg = <0x1000 0x600>, <0x2610 0x4>;
+                       reg-names = "hsspi", "spim-ctrl";
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;
index 62c530d..f41ebc3 100644 (file)
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        psci {
                        clock-names = "refclk";
                        status = "disabled";
                };
+
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
        };
 };
index 34c7b51..fa2688f 100644 (file)
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        psci {
                        clock-names = "refclk";
                        status = "disabled";
                };
+
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
        };
 };
index fcbd3c4..c4e6e71 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index a3623e6..e69cd68 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index e39f1e6..db2c82d 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index eba07e0..25c12bc 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index af17091..faba21f 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index 032aeb7..9808331 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};
index 0cbf582..1f561c8 100644 (file)
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};