ARM: dts: imx: add nvmem property for cpu0

Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index bba25d0..77b65a4 100644 (file)
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -44,6 +44,8 @@
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
 
                cpu@1 {

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 907cf83..78a4d64 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -49,6 +49,8 @@
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
 
                cpu1: cpu@1 {

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 33efe7e..4798288 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1165,6 +1165,12 @@
                                compatible = "fsl,imx6q-ocotp", "syscon";
                                reg = <0x021bc000 0x4000>;
                                clocks = <&clks IMX6QDL_CLK_IIM>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
                        };
 
                        tzasc@21d0000 { /* TZASC1 */

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c6141ed..8230b45 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -74,6 +74,8 @@
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
        };
 
@@ -953,6 +955,12 @@
                                compatible = "fsl,imx6sl-ocotp", "syscon";
                                reg = <0x021bc000 0x4000>;
                                clocks = <&clks IMX6SL_CLK_OCOTP>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
                        };
 
                        audmux: audmux@21d8000 {

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index e8e0fb3..edd3abb 100644 (file)
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -72,6 +72,8 @@
                                 <&clks IMX6SLL_CLK_PLL1_SYS>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
                                      "pll1_sw", "pll1_sys";
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
        };
 
@@ -791,6 +793,10 @@
                                reg = <0x021bc000 0x4000>;
                                clocks = <&clks IMX6SLL_CLK_OCOTP>;
 
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
+
                                tempmon_calib: calib@38 {
                                        reg = <0x38 4>;
                                };

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index c48ef39..d6f8317 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -87,6 +87,8 @@
                                      "pll1_sw", "pll1_sys";
                        arm-supply = <&reg_arm>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
        };
 
@@ -1058,6 +1060,10 @@
                                reg = <0x021bc000 0x4000>;
                                clocks = <&clks IMX6SX_CLK_OCOTP>;
 
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
+
                                tempmon_calib: calib@38 {
                                        reg = <0x38 4>;
                                };