#include "../all_aligned_atomic_load_store.h"
#include "../acquire_release_volatile.h"
#include "../test_and_set_t_is_ao_t.h"
-#include "../standard_ao_double_t.h"
/* Data dependence does not imply read ordering. */
#define AO_NO_DD_ORDERING
}
#define AO_HAVE_fetch_compare_and_swap
+/* #include "../standard_ao_double_t.h" */
+/* TODO: implement AO_compare_double_and_swap_double if available. */
+
/* CAS primitives with acquire, release and full semantics are */
/* generated automatically (and AO_int_... primitives are */
/* defined properly after the first generalization pass). */
#include "../test_and_set_t_is_char.h"
-#include "../standard_ao_double_t.h"
-
AO_INLINE void
AO_nop_full(void)
{
#ifdef AO_CMPXCHG16B_AVAILABLE
+# include "../standard_ao_double_t.h"
+
/* NEC LE-IT: older AMD Opterons are missing this instruction.
* On these machines SIGILL will be thrown.
* Define AO_WEAK_DOUBLE_CAS_EMULATION to have an emulated
/* not atomic with respect to other kinds of updates of *addr. On the */
/* other hand, this may be a useful facility on occasion. */
#ifdef AO_WEAK_DOUBLE_CAS_EMULATION
+# include "../standard_ao_double_t.h"
+
int AO_compare_double_and_swap_double_emulation(volatile AO_double_t *addr,
AO_t old_val1, AO_t old_val2,
AO_t new_val1, AO_t new_val2);
#if _M_ARM >= 6
/* ARMv6 is the first architecture providing support for simple LL/SC. */
-#include "../standard_ao_double_t.h"
-
/* If only a single processor is used, we can define AO_UNIPROCESSOR */
/* and do not need to access CP15 for ensuring a DMB at all. */
#ifdef AO_UNIPROCESSOR
}
#define AO_HAVE_store_full
+/* #include "../standard_ao_double_t.h" */
/* FIXME: implement AO_compare_double_and_swap_double() */
#else /* _M_ARM < 6 */
# include "../test_and_set_t_is_ao_t.h"
#endif
-#include "../standard_ao_double_t.h"
-
#include <windows.h>
/* Seems like over-kill, but that's what MSDN recommends. */
/* And apparently winbase.h is not always self-contained. */
# if _MSC_VER >= 1500
-#pragma intrinsic (_InterlockedCompareExchange128)
+# include "../standard_ao_double_t.h"
+
+# pragma intrinsic (_InterlockedCompareExchange128)
AO_INLINE int
AO_compare_double_and_swap_double_full(volatile AO_double_t *addr,
# define AO_HAVE_compare_double_and_swap_double_full
# elif defined(AO_ASM_X64_AVAILABLE)
+
+# include "../standard_ao_double_t.h"
+
/* If there is no intrinsic _InterlockedCompareExchange128 then we */
/* need basically what's given below. */
AO_INLINE int
}
}
# define AO_HAVE_compare_double_and_swap_double_full
-# endif /* _MSC_VER >= 1500 || AO_ASM_X64_AVAILABLE */
+# endif /* AO_ASM_X64_AVAILABLE && (_MSC_VER < 1500) */
#endif /* AO_CMPXCHG16B_AVAILABLE */
#include "../test_and_set_t_is_char.h"
-#include "../standard_ao_double_t.h"
-
#if !defined(AO_USE_PENTIUM4_INSTRS) && !defined(__i386)
/* "mfence" (SSE2) is supported on all x86_64/amd64 chips. */
# define AO_USE_PENTIUM4_INSTRS
#if defined(__i386)
# ifndef AO_NO_CMPXCHG8B
+# include "../standard_ao_double_t.h"
+
/* Returns nonzero if the comparison succeeded. */
/* Really requires at least a Pentium. */
AO_INLINE int
# define AO_HAVE_int_fetch_and_add_full
# ifdef AO_CMPXCHG16B_AVAILABLE
+# include "../standard_ao_double_t.h"
+
/* Older AMD Opterons are missing this instruction (SIGILL should */
/* be thrown in this case). */
AO_INLINE int