[ Upstream commit
923fb6238cb3ac529aa2bf13b3b1e53762186a8b ]
Under heavy load it is likely that the controller is done
with its own task but the thread unlocking the wait is not
scheduled in time. Increasing IFC_TIMEOUT_MSECS allows the
controller to respond within allowable timeslice of 1 sec.
fsl,ifc-nand
7e800000.nand: Controller is not responding
[<
804b2047>] (nand_get_device) from [<
804b5335>] (nand_write_oob+0x1b/0x4a)
[<
804b5335>] (nand_write_oob) from [<
804a3585>] (mtd_write+0x41/0x5c)
[<
804a3585>] (mtd_write) from [<
804c1d47>] (ubi_io_write+0x17f/0x22c)
[<
804c1d47>] (ubi_io_write) from [<
804c047b>] (ubi_eba_write_leb+0x5b/0x1d0)
Fixes:
82771882d960 ("NAND Machine support for Integrated Flash Controller")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Ronald Monthero <debug.penguin32@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20231118083156.776887-1-debug.penguin32@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
#define ERR_BYTE 0xFF /* Value returned for read
bytes when read failed */
-#define IFC_TIMEOUT_MSECS 500 /* Maximum number of mSecs to wait
+#define IFC_TIMEOUT_MSECS 1000 /* Maximum timeout to wait
for IFC NAND Machine */
struct fsl_ifc_ctrl;