struct pci_dev *pci_dev;
/* whether or not the watchdog has been suspended */
bool suspended;
+ /* no reboot update function pointer */
+ int (*update_no_reboot_bit)(void *p, bool set);
};
/* module parameters */
return enable_bit;
}
-static void iTCO_wdt_set_NO_REBOOT_bit(struct iTCO_wdt_private *p)
+static int update_no_reboot_bit_def(void *priv, bool set)
{
- u32 val32;
-
- /* Set the NO_REBOOT bit: this disables reboots */
- if (p->iTCO_version >= 2) {
- val32 = readl(p->gcs_pmc);
- val32 |= no_reboot_bit(p);
- writel(val32, p->gcs_pmc);
- } else if (p->iTCO_version == 1) {
- pci_read_config_dword(p->pci_dev, 0xd4, &val32);
- val32 |= no_reboot_bit(p);
- pci_write_config_dword(p->pci_dev, 0xd4, val32);
- }
+ return 0;
}
-static int iTCO_wdt_unset_NO_REBOOT_bit(struct iTCO_wdt_private *p)
+static int update_no_reboot_bit_pci(void *priv, bool set)
{
- u32 enable_bit = no_reboot_bit(p);
- u32 val32 = 0;
+ struct iTCO_wdt_private *p = priv;
+ u32 val32 = 0, newval32 = 0;
- /* Unset the NO_REBOOT bit: this enables reboots */
- if (p->iTCO_version >= 2) {
- val32 = readl(p->gcs_pmc);
- val32 &= ~enable_bit;
- writel(val32, p->gcs_pmc);
+ pci_read_config_dword(p->pci_dev, 0xd4, &val32);
+ if (set)
+ val32 |= no_reboot_bit(p);
+ else
+ val32 &= ~no_reboot_bit(p);
+ pci_write_config_dword(p->pci_dev, 0xd4, val32);
+ pci_read_config_dword(p->pci_dev, 0xd4, &newval32);
- val32 = readl(p->gcs_pmc);
- } else if (p->iTCO_version == 1) {
- pci_read_config_dword(p->pci_dev, 0xd4, &val32);
- val32 &= ~enable_bit;
- pci_write_config_dword(p->pci_dev, 0xd4, val32);
+ /* make sure the update is successful */
+ if (val32 != newval32)
+ return -EIO;
- pci_read_config_dword(p->pci_dev, 0xd4, &val32);
- }
+ return 0;
+}
+
+static int update_no_reboot_bit_mem(void *priv, bool set)
+{
+ struct iTCO_wdt_private *p = priv;
+ u32 val32 = 0, newval32 = 0;
+
+ val32 = readl(p->gcs_pmc);
+ if (set)
+ val32 |= no_reboot_bit(p);
+ else
+ val32 &= ~no_reboot_bit(p);
+ writel(val32, p->gcs_pmc);
+ newval32 = readl(p->gcs_pmc);
- if (val32 & enable_bit)
+ /* make sure the update is successful */
+ if (val32 != newval32)
return -EIO;
return 0;
}
+static void iTCO_wdt_no_reboot_bit_setup(struct iTCO_wdt_private *p)
+{
+ if (p->iTCO_version >= 2)
+ p->update_no_reboot_bit = update_no_reboot_bit_mem;
+ else if (p->iTCO_version == 1)
+ p->update_no_reboot_bit = update_no_reboot_bit_pci;
+ else
+ p->update_no_reboot_bit = update_no_reboot_bit_def;
+}
+
static int iTCO_wdt_start(struct watchdog_device *wd_dev)
{
struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout);
/* disable chipset's NO_REBOOT bit */
- if (iTCO_wdt_unset_NO_REBOOT_bit(p)) {
+ if (p->update_no_reboot_bit(p, false)) {
spin_unlock(&p->io_lock);
pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
return -EIO;
val = inw(TCO1_CNT(p));
/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
- iTCO_wdt_set_NO_REBOOT_bit(p);
+ p->update_no_reboot_bit(p, true);
spin_unlock(&p->io_lock);
p->iTCO_version = pdata->version;
p->pci_dev = to_pci_dev(dev->parent);
+ iTCO_wdt_no_reboot_bit_setup(p);
+
/*
* Get the Memory-Mapped GCS or PMC register, we need it for the
* NO_REBOOT flag (TCO v2 and v3).
}
/* Check chipset's NO_REBOOT bit */
- if (iTCO_wdt_unset_NO_REBOOT_bit(p) &&
+ if (p->update_no_reboot_bit(p, false) &&
iTCO_vendor_check_noreboot_on()) {
pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
return -ENODEV; /* Cannot reset NO_REBOOT bit */
}
/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
- iTCO_wdt_set_NO_REBOOT_bit(p);
+ p->update_no_reboot_bit(p, true);
/* The TCO logic uses the TCO_EN bit in the SMI_EN register */
if (!devm_request_region(dev, p->smi_res->start,