usb: dwc3: Add splitdisable quirk for Hisilicon Kirin Soc

SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core
of Hisilicon Kirin Soc when dwc3 core act as host.

[mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver]

Signed-off-by: Yu Chen <chenyu56@huawei.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 385262f..bdf0925 100644 (file)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -119,6 +119,7 @@ static void __dwc3_set_mode(struct work_struct *work)
        struct dwc3 *dwc = work_to_dwc(work);
        unsigned long flags;
        int ret;
+       u32 reg;
 
        pm_runtime_get_sync(dwc->dev);
 
@@ -169,6 +170,11 @@ static void __dwc3_set_mode(struct work_struct *work)
                                otg_set_vbus(dwc->usb2_phy->otg, true);
                        phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
                        phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
+                       if (dwc->dis_split_quirk) {
+                               reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
+                               reg |= DWC3_GUCTL3_SPLITDISABLE;
+                               dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
+                       }
                }
                break;
        case DWC3_GCTL_PRTCAP_DEVICE:
@@ -1349,6 +1355,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
        dwc->dis_metastability_quirk = device_property_read_bool(dev,
                                "snps,dis_metastability_quirk");
 
+       dwc->dis_split_quirk = device_property_read_bool(dev,
+                               "snps,dis-split-quirk");
+
        dwc->lpm_nyet_threshold = lpm_nyet_threshold;
        dwc->tx_de_emphasis = tx_de_emphasis;
 
@@ -1886,10 +1895,26 @@ static int dwc3_resume(struct device *dev)
 
        return 0;
 }
+
+static void dwc3_complete(struct device *dev)
+{
+       struct dwc3     *dwc = dev_get_drvdata(dev);
+       u32             reg;
+
+       if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST &&
+                       dwc->dis_split_quirk) {
+               reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
+               reg |= DWC3_GUCTL3_SPLITDISABLE;
+               dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
+       }
+}
+#else
+#define dwc3_complete NULL
 #endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops dwc3_dev_pm_ops = {
        SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume)
+       .complete = dwc3_complete,
        SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume,
                        dwc3_runtime_idle)
 };

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 83b6c87..74323b1 100644 (file)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -138,6 +138,7 @@
 #define DWC3_GEVNTCOUNT(n)     (0xc40c + ((n) * 0x10))
 
 #define DWC3_GHWPARAMS8                0xc600
+#define DWC3_GUCTL3            0xc60c
 #define DWC3_GFLADJ            0xc630
 
 /* Device Registers */
@@ -380,6 +381,9 @@
 /* Global User Control Register 2 */
 #define DWC3_GUCTL2_RST_ACTBITLATER            BIT(14)
 
+/* Global User Control Register 3 */
+#define DWC3_GUCTL3_SPLITDISABLE               BIT(14)
+
 /* Device Configuration Register */
 #define DWC3_DCFG_DEVADDR(addr)        ((addr) << 3)
 #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -1053,6 +1057,7 @@ struct dwc3_scratchpad_array {
  *     2       - No de-emphasis
  *     3       - Reserved
  * @dis_metastability_quirk: set to disable metastability quirk.
+ * @dis_split_quirk: set to disable split boundary.
  * @imod_interval: set the interrupt moderation interval in 250ns
  *                     increments or 0 to disable.
  */
@@ -1246,6 +1251,8 @@ struct dwc3 {
 
        unsigned                dis_metastability_quirk:1;
 
+       unsigned                dis_split_quirk:1;
+
        u16                     imod_interval;
 };