drm/amdgpu: Update ras eeprom support for smu v13_0_0 and v13_0_10

[ Upstream commit bc22f8ec464af9e14263c3ed6a1c2be86618c804 ]

Enable RAS EEPROM support for smu v13_0_0 and v13_0_10.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stable-dep-of: e0409021e34a ("drm/amdgpu: Update EEPROM I2C address for smu v13_0_0")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 84c241b..7dc3915 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -90,6 +90,16 @@
 
 static bool __is_ras_eeprom_supported(struct amdgpu_device *adev)
 {
+       if (adev->asic_type == CHIP_IP_DISCOVERY) {
+               switch (adev->ip_versions[MP1_HWIP][0]) {
+               case IP_VERSION(13, 0, 0):
+               case IP_VERSION(13, 0, 10):
+                       return true;
+               default:
+                       return false;
+               }
+       }
+
        return  adev->asic_type == CHIP_VEGA20 ||
                adev->asic_type == CHIP_ARCTURUS ||
                adev->asic_type == CHIP_SIENNA_CICHLID ||