[X86][MMX] Add IIC_MMX_MOVMSK instruction itinerary class

llvm-svn: 318999

diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td
index d387f93..039b4a2 100644 (file)
--- a/llvm/lib/Target/X86/X86InstrMMX.td
+++ b/llvm/lib/Target/X86/X86InstrMMX.td
@@ -616,7 +616,8 @@ def MMX_PMOVMSKBrr : MMXI<0xD7, MRMSrcReg, (outs GR32orGR64:$dst),
                           (ins VR64:$src),
                           "pmovmskb\t{$src, $dst|$dst, $src}",
                           [(set GR32orGR64:$dst,
-                                (int_x86_mmx_pmovmskb VR64:$src))]>;
+                                (int_x86_mmx_pmovmskb VR64:$src))],
+                          IIC_MMX_MOVMSK>, Sched<[WriteVecLogic]>;
 
 // Low word of XMM to MMX.
 def MMX_X86movdq2q : SDNode<"X86ISD::MOVDQ2Q", SDTypeProfile<1, 1,

diff --git a/llvm/lib/Target/X86/X86Schedule.td b/llvm/lib/Target/X86/X86Schedule.td
index fcf9f4f..91d450c 100644 (file)
--- a/llvm/lib/Target/X86/X86Schedule.td
+++ b/llvm/lib/Target/X86/X86Schedule.td
@@ -426,7 +426,7 @@ def IIC_MMX_PSHUF : InstrItinClass;
 def IIC_MMX_PEXTR : InstrItinClass;
 def IIC_MMX_PINSRW : InstrItinClass;
 def IIC_MMX_MASKMOV : InstrItinClass;
-
+def IIC_MMX_MOVMSK : InstrItinClass;
 def IIC_MMX_CVT_PD_RR : InstrItinClass;
 def IIC_MMX_CVT_PD_RM : InstrItinClass;
 def IIC_MMX_CVT_PS_RR : InstrItinClass;

diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td
index 200a321..1a070f7 100644 (file)
--- a/llvm/lib/Target/X86/X86ScheduleAtom.td
+++ b/llvm/lib/Target/X86/X86ScheduleAtom.td
@@ -338,6 +338,7 @@ def AtomItineraries : ProcessorItineraries<
   InstrItinData<IIC_MMX_PEXTR,   [InstrStage<4, [Port0, Port1]>] >,
   InstrItinData<IIC_MMX_PINSRW,  [InstrStage<1, [Port0]>] >,
   InstrItinData<IIC_MMX_MASKMOV, [InstrStage<1, [Port0]>] >,
+  InstrItinData<IIC_MMX_MOVMSK, [InstrStage<3, [Port0]>] >,
   // conversions
   // from/to PD
   InstrItinData<IIC_MMX_CVT_PD_RR, [InstrStage<7, [Port0, Port1]>] >,

diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll
index 7f7c00d..6b99559 100644 (file)
--- a/llvm/test/CodeGen/X86/mmx-schedule.ll
+++ b/llvm/test/CodeGen/X86/mmx-schedule.ll
@@ -4088,22 +4088,22 @@ declare x86_mmx @llvm.x86.mmx.pminu.b(x86_mmx, x86_mmx) nounwind readnone
 define i32 @test_pmovmskb(x86_mmx %a0) optsize {
 ; GENERIC-LABEL: test_pmovmskb:
 ; GENERIC:       # BB#0:
-; GENERIC-NEXT:    pmovmskb %mm0, %eax
+; GENERIC-NEXT:    pmovmskb %mm0, %eax # sched: [1:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; ATOM-LABEL: test_pmovmskb:
 ; ATOM:       # BB#0:
-; ATOM-NEXT:    pmovmskb %mm0, %eax
+; ATOM-NEXT:    pmovmskb %mm0, %eax # sched: [3:3.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_pmovmskb:
 ; SLM:       # BB#0:
-; SLM-NEXT:    pmovmskb %mm0, %eax
+; SLM-NEXT:    pmovmskb %mm0, %eax # sched: [1:0.50]
 ; SLM-NEXT:    retq # sched: [4:1.00]
 ;
 ; SANDY-LABEL: test_pmovmskb:
 ; SANDY:       # BB#0:
-; SANDY-NEXT:    pmovmskb %mm0, %eax
+; SANDY-NEXT:    pmovmskb %mm0, %eax # sched: [1:1.00]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_pmovmskb:
@@ -4128,7 +4128,7 @@ define i32 @test_pmovmskb(x86_mmx %a0) optsize {
 ;
 ; BTVER2-LABEL: test_pmovmskb:
 ; BTVER2:       # BB#0:
-; BTVER2-NEXT:    pmovmskb %mm0, %eax
+; BTVER2-NEXT:    pmovmskb %mm0, %eax # sched: [1:0.50]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
 ; ZNVER1-LABEL: test_pmovmskb: