Optimise comparison where intermediate result not used (AArch64)

From-SVN: r193450

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 50fd4d4..c03a235 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2012-11-12  Ian Bolton  <ian.bolton@arm.com>
+
+       * config/aarch64/aarch64.md (*compare_neg<mode>): New pattern.
+
 2012-11-12  Tobias Burnus  <burnus@net-b.de>
 
        * doc/invoke.texi: Move -faddress-sanitizer from Optimization

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 804d7e7..077a89e 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1318,6 +1318,17 @@
    (set_attr "mode" "<MODE>")]
 )
 
+(define_insn "*compare_neg<mode>"
+  [(set (reg:CC CC_REGNUM)
+       (compare:CC
+        (match_operand:GPI 0 "register_operand" "r")
+        (neg:GPI (match_operand:GPI 1 "register_operand" "r"))))]
+  ""
+  "cmn\\t%<w>0, %<w>1"
+  [(set_attr "v8type" "alus")
+   (set_attr "mode" "<MODE>")]
+)
+
 (define_insn "*add_<shift>_<mode>"
   [(set (match_operand:GPI 0 "register_operand" "=rk")
        (plus:GPI (ASHIFT:GPI (match_operand:GPI 1 "register_operand" "r")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 87023e7..3cda5b6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2012-11-12  Ian Bolton  <ian.bolton@arm.com>
+
+       * gcc.target/aarch64/cmn.c: New test.
+       * gcc.target/aarch64/adds.c: New test.
+       * gcc.target/aarch64/subs.c: New test.
+
 2012-11-12  Tobias Burnus  <burnus@net-b.de>
 
        PR fortran/55272

diff --git a/gcc/testsuite/gcc.target/aarch64/adds.c b/gcc/testsuite/gcc.target/aarch64/adds.c
new file mode 100644 (file)
index 0000000..aa42321
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/adds.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int z;
+int
+foo (int x, int y)
+{
+  int l = x + y;
+  if (l == 0)
+    return 5;
+
+  /* { dg-final { scan-assembler "adds\tw\[0-9\]" } } */
+  z = l ;
+  return 25;
+}
+
+typedef long long s64;
+
+s64 zz;
+s64
+foo2 (s64 x, s64 y)
+{
+  s64 l = x + y;
+  if (l < 0)
+    return 5;
+
+  /* { dg-final { scan-assembler "adds\tx\[0-9\]" } } */
+  zz = l ;
+  return 25;
+}

diff --git a/gcc/testsuite/gcc.target/aarch64/cmn.c b/gcc/testsuite/gcc.target/aarch64/cmn.c
new file mode 100644 (file)
index 0000000..1f06f57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cmn.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+foo (int a, int b)
+{
+  if (a + b)
+    return 5;
+  else
+    return 2;
+  /* { dg-final { scan-assembler "cmn\tw\[0-9\]" } } */
+}
+
+typedef long long s64;
+
+s64
+foo2 (s64 a, s64 b)
+{
+  if (a + b)
+    return 5;
+  else
+    return 2;
+  /* { dg-final { scan-assembler "cmn\tx\[0-9\]" } } */
+}  

diff --git a/gcc/testsuite/gcc.target/aarch64/subs.c b/gcc/testsuite/gcc.target/aarch64/subs.c
new file mode 100644 (file)
index 0000000..2bf1975
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/subs.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int z;
+int
+foo (int x, int y)
+{
+  int l = x - y;
+  if (l == 0)
+    return 5;
+
+  /* { dg-final { scan-assembler "subs\tw\[0-9\]" } } */
+  z = l ;
+  return 25;
+}
+
+typedef long long s64;
+
+s64 zz;
+s64
+foo2 (s64 x, s64 y)
+{
+  s64 l = x - y;
+  if (l < 0)
+    return 5;
+
+  /* { dg-final { scan-assembler "subs\tx\[0-9\]" } } */
+  zz = l ;
+  return 25;
+}