bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T,
bi_index rgba2, nir_alu_type T2, unsigned rt)
{
- /* On Valhall, BLEND does not encode the return address */
- bool bifrost = b->shader->arch <= 8;
-
/* Reads 2 or 4 staging registers to cover the input */
unsigned size = nir_alu_type_get_type_size(T);
unsigned size_2 = nir_alu_type_get_type_size(T2);
/* Blend descriptor comes from the compile inputs */
/* Put the result in r0 */
- bi_blend_to(b, bifrost ? bi_temp(b->shader) : bi_null(), rgba,
- bi_coverage(b),
- bi_imm_u32(blend_desc),
- bi_imm_u32(blend_desc >> 32),
- bi_null(), regfmt, sr_count, 0);
+ bi_blend_to(b, bi_temp(b->shader), rgba, bi_coverage(b),
+ bi_imm_u32(blend_desc),
+ bi_imm_u32(blend_desc >> 32),
+ bi_null(), regfmt, sr_count, 0);
} else {
/* Blend descriptor comes from the FAU RAM. By convention, the
* return address on Bifrost is stored in r48 and will be used
* by the blend shader to jump back to the fragment shader */
- bi_blend_to(b, bifrost ? bi_temp(b->shader) : bi_null(), rgba,
- bi_coverage(b),
- bi_fau(BIR_FAU_BLEND_0 + rt, false),
- bi_fau(BIR_FAU_BLEND_0 + rt, true),
- rgba2, regfmt, sr_count, sr_count_2);
+ bi_blend_to(b, bi_temp(b->shader), rgba, bi_coverage(b),
+ bi_fau(BIR_FAU_BLEND_0 + rt, false),
+ bi_fau(BIR_FAU_BLEND_0 + rt, true),
+ rgba2, regfmt, sr_count, sr_count_2);
}
assert(rt < 8);
TEST(MarkLast, RegisterBlendDescriptor) {
CASE({
- bi_blend_to(b, bi_null(), R(0), DR(60), DR(4), DR(5), bi_null(),
+ bi_blend_to(b, R(48), R(0), DR(60), DR(4), DR(5), bi_null(),
BI_REGISTER_FORMAT_F32, 4, 0);
});
CASE({
- bi_blend_to(b, bi_null(), R(0), DR(60), R(4), R(5), bi_null(),
+ bi_blend_to(b, R(48), R(0), DR(60), R(4), R(5), bi_null(),
BI_REGISTER_FORMAT_F32, 4, 0);
bi_fadd_f32_to(b, R(4), DR(4), DR(7));
});
CASE({
- bi_blend_to(b, bi_null(), R(0), DR(60), R(4), R(5), bi_null(),
+ bi_blend_to(b, R(48), R(0), DR(60), R(4), R(5), bi_null(),
BI_REGISTER_FORMAT_F32, 4, 0);
bi_fadd_f32_to(b, R(4), DR(5), DR(7));
});
static void
va_lower_blend(bi_context *ctx)
{
- /* Link register (ABI between fragment and blend shaders) */
- bi_index lr = bi_register(48);
-
/* Program counter for *next* instruction */
bi_index pc = bi_fau(BIR_FAU_PROGRAM_COUNTER, false);
unsigned prolog_length = 2 * 8;
+ /* By ABI, r48 is the link register shared with blend shaders */
+ assert(bi_is_equiv(I->dest[0], bi_register(48)));
+
if (I->flow == VA_FLOW_END)
- bi_iadd_imm_i32_to(&b, lr, va_zero_lut(), 0);
+ bi_iadd_imm_i32_to(&b, I->dest[0], va_zero_lut(), 0);
else
- bi_iadd_imm_i32_to(&b, lr, pc, prolog_length - 8);
+ bi_iadd_imm_i32_to(&b, I->dest[0], pc, prolog_length - 8);
bi_branchzi(&b, va_zero_lut(), I->src[3], BI_CMPF_EQ);