PCI/ASPM: Return 0 or -ETIMEDOUT from pcie_retrain_link()

"pcie_retrain_link" is not a question with a true/false answer, so "bool"
isn't quite the right return type.  Return 0 for success or -ETIMEDOUT if
the retrain failed.  No functional change intended.

[bhelgaas: based on Ilpo's patch below]
Link: https://lore.kernel.org/r/20230502083923.34562-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 72cdb30a924ae134ed540f00a62d4741fe4afc96..ee6323ded1c81801a45b85c62825fd8cc7784a8e 100644 (file)
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -193,7 +193,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
        link->clkpm_disable = blacklist ? 1 : 0;
 }
 
-static bool pcie_retrain_link(struct pcie_link_state *link)
+static int pcie_retrain_link(struct pcie_link_state *link)
 {
        struct pci_dev *parent = link->pdev;
        unsigned long end_jiffies;
@@ -220,7 +220,9 @@ static bool pcie_retrain_link(struct pcie_link_state *link)
                        break;
                msleep(1);
        } while (time_before(jiffies, end_jiffies));
-       return !(reg16 & PCI_EXP_LNKSTA_LT);
+       if (reg16 & PCI_EXP_LNKSTA_LT)
+               return -ETIMEDOUT;
+       return 0;
 }
 
 /*
@@ -289,15 +291,15 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
                reg16 &= ~PCI_EXP_LNKCTL_CCC;
        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
 
-       if (pcie_retrain_link(link))
-               return;
+       if (pcie_retrain_link(link)) {
 
-       /* Training failed. Restore common clock configurations */
-       pci_err(parent, "ASPM: Could not configure common clock\n");
-       list_for_each_entry(child, &linkbus->devices, bus_list)
-               pcie_capability_write_word(child, PCI_EXP_LNKCTL,
+               /* Training failed. Restore common clock configurations */
+               pci_err(parent, "ASPM: Could not configure common clock\n");
+               list_for_each_entry(child, &linkbus->devices, bus_list)
+                       pcie_capability_write_word(child, PCI_EXP_LNKCTL,
                                           child_reg[PCI_FUNC(child->devfn)]);
-       pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
+               pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
+       }
 }
 
 /* Convert L0s latency encoding to ns */