ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 17 May 2023 09:41:17 +0000 (12:41 +0300)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Mon, 22 May 2023 13:00:34 +0000 (16:00 +0300)
Switch slow clock controller to new clock bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-4-claudiu.beznea@microchip.com
arch/arm/boot/dts/at91sam9n12.dtsi

index c2e7460..0e28101 100644 (file)
                                clocks = <&clk32k>;
                        };
 
-                       sckc@fffffe50 {
+                       clk32k: clock-controller@fffffe50 {
                                compatible = "atmel,at91sam9x5-sckc";
                                reg = <0xfffffe50 0x4>;
-
-                               slow_osc: slow_osc {
-                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
-                                       #clock-cells = <0>;
-                                       clocks = <&slow_xtal>;
-                               };
-
-                               slow_rc_osc: slow_rc_osc {
-                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
-                                       #clock-cells = <0>;
-                                       clock-frequency = <32768>;
-                                       clock-accuracy = <50000000>;
-                               };
-
-                               clk32k: slck {
-                                       compatible = "atmel,at91sam9x5-clk-slow";
-                                       #clock-cells = <0>;
-                                       clocks = <&slow_rc_osc>, <&slow_osc>;
-                               };
+                               clocks = <&slow_xtal>;
+                               #clock-cells = <0>;
                        };
 
                        mmc0: mmc@f0008000 {