clocksource: vf_pit_timer: Switch to sched_clock_register()

The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.

Cc: Jingchang Lu <b35083@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>

diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c
index 587e0202a70b263677abe66f2eff513fe491619a..02821b06a39e33be4cb403b202286deb530ff399 100644 (file)
--- a/drivers/clocksource/vf_pit_timer.c
+++ b/drivers/clocksource/vf_pit_timer.c
@@ -52,7 +52,7 @@ static inline void pit_irq_acknowledge(void)
        __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
 }
 
-static unsigned int pit_read_sched_clock(void)
+static u64 pit_read_sched_clock(void)
 {
        return __raw_readl(clksrc_base + PITCVAL);
 }
@@ -64,7 +64,7 @@ static int __init pit_clocksource_init(unsigned long rate)
        __raw_writel(~0UL, clksrc_base + PITLDVAL);
        __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
 
-       setup_sched_clock(pit_read_sched_clock, 32, rate);
+       sched_clock_register(pit_read_sched_clock, 32, rate);
        return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate,
                        300, 32, clocksource_mmio_readl_down);
 }