dts: add axg dts file
authorYun Cai <yun.cai@amlogic.com>
Sun, 9 Apr 2017 07:32:17 +0000 (15:32 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Wed, 26 Apr 2017 11:28:13 +0000 (04:28 -0700)
PD#142470: add dts for axg pxp

Change-Id: I0d5c77368b0583fcfa046f4c01ac936704e96434
Signed-off-by: Yun Cai <yun.cai@amlogic.com>
MAINTAINERS
arch/arm64/boot/dts/amlogic/axg_pxp.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/mesonaxg.dtsi [new file with mode: 0644]
scripts/amlogic/mk_dtb_gx.sh [changed mode: 0644->0755]

index 67e6b5f..91cbb7f 100644 (file)
@@ -13840,3 +13840,8 @@ F: include/linux/amlogic/media/amvecm/*
 AMLOGIC GXL ADD SKT DTS
 M: Yun Cai <yun.cai@amlogic.com>
 F: arch/arm64/boot/dts/amlogic/gxl_skt.dts
+
+AMLOGIC AXG ADD PXP DTS
+M: Yun Cai <yun.cai@amlogic.com>
+F: arch/arm64/boot/dts/amlogic/axg_pxp.dts
+F: arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
diff --git a/arch/arm64/boot/dts/amlogic/axg_pxp.dts b/arch/arm64/boot/dts/amlogic/axg_pxp.dts
new file mode 100644 (file)
index 0000000..d17b4a5
--- /dev/null
@@ -0,0 +1,79 @@
+/*
+ * arch/arm64/boot/dts/amlogic/axg_pxp.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesonaxg.dtsi"
+
+/ {
+       model = "Amlogic";
+       compatible = "amlogic, axg";
+       interrupt-parent = <&gic>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               serial0 = &uart_AO;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x0 0x100000 0x0 0x3ff00000>;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               secmon_reserved:linux,secmon {
+                       compatible = "amlogic, aml_secmon_memory";
+                       reg = <0x0 0x10000000 0x0 0x200000>;
+                       no-map;
+               };
+
+               secos_reserved:linux,secos {
+                       status = "disable";
+                       compatible = "amlogic, aml_secos_memory";
+                       reg = <0x0 0x05300000 0x0 0x2000000>;
+                       no-map;
+               };
+
+               pstore:aml_pstore {
+                       compatible = "amlogic, pstore";
+                       reg = <0x0 0x07300000 0x0 0x100000>;
+                       no-map;
+               };
+       };
+
+
+       uart_AO: serial@ff803000 {
+               compatible = "amlogic, meson-uart";
+               reg = <0x0 0xff803000 0x0 0x18>;
+               interrupts = <0 193 1>;
+               status = "okay";
+               clocks = <&xtal>;
+               clock-names = "clk_uart";
+               xtal_tick_en = <1>;
+               fifosize = < 64 >;
+//             pinctrl-names = "default";
+//             pinctrl-0 = <&uart_ao_a_pins>;
+               support-sysrq = <0>;    /* 0 not support , 1 support */
+       };
+
+}; /* end of / */
+
diff --git a/arch/arm64/boot/dts/amlogic/mesonaxg.dtsi b/arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
new file mode 100644 (file)
index 0000000..4a6597e
--- /dev/null
@@ -0,0 +1,149 @@
+/*
+ * arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       cpus:cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+               #cooling-cells = <2>; /* min followed by max */
+
+               cpu0:cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x0>;
+                       enable-method = "psci";
+               };
+
+               cpu1:cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x1>;
+                       enable-method = "psci";
+               };
+               cpu2:cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x2>;
+                       enable-method = "psci";
+               };
+
+               cpu3:cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53","arm,armv8";
+                       reg = <0x0 0x3>;
+                       enable-method = "psci";
+               };
+
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 0xff01>,
+                            <GIC_PPI 14 0xff01>,
+                            <GIC_PPI 11 0xff01>,
+                            <GIC_PPI 10 0xff01>;
+       };
+       timer_bc {
+               compatible = "arm, meson-bc-timer";
+               reg=   <0x0 0xffd0f190 0x0 0x4 0x0 0xffd0f194 0x0 0x4>;
+               timer_name = "Meson TimerF";
+               clockevent-rating=<300>;
+               clockevent-shift=<20>;
+               clockevent-features=<0x23>;
+               interrupts = <0 60 1>;
+               bit_enable=<16>;
+               bit_mode=<12>;
+               bit_resolution=<0>;
+       };
+       arm_pmu {
+               compatible = "arm,armv8-pmuv3";
+               interrupts = <0 137 4>,
+                            <0 138 4>,
+                            <0 153 4>,
+                            <0 154 4>;
+       };
+
+       gic: interrupt-controller@2c001000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               #address-cells = <0>;
+               interrupt-controller;
+               reg = <0x0 0xffc01000 0 0x1000>,
+                     <0x0 0xffc02000 0 0x0100>;
+               interrupts = <GIC_PPI 9 0xf04>;
+       };
+
+       psci {
+               compatible = "arm,psci";
+               method = "smc";
+       };
+
+       secmon {
+               compatible = "amlogic, secmon";
+               memory-region = <&secmon_reserved>;
+               in_base_func = <0x82000020>;
+               out_base_func = <0x82000021>;
+       };
+
+       cpu_iomap {
+               compatible = "amlogic, iomap";
+               #address-cells=<2>;
+               #size-cells=<2>;
+               ranges;
+               io_cbus_base {
+                       reg = <0x0 0xffd00000 0x0 0x100000>;
+               };
+               io_apb_base {
+                       reg = <0x0 0xffe00000 0x0 0x100000>;
+               };
+               io_aobus_base {
+                       reg = <0x0 0xff800000 0x0 0x100000>;
+               };
+               io_vapb_base {
+                       reg = <0x0 0xff900000 0x0 0x050000>;
+               };
+       };
+
+       xtal: xtal-clk {
+               compatible = "fixed-clock";
+               clock-frequency = <24000000>;
+               clock-output-names = "xtal";
+               #clock-cells = <0>;
+       };
+
+       cpu_info {
+               compatible = "amlogic, cpuinfo";
+               status = "okay";
+               cpuinfo_cmd = <0x82000044>;
+       };
+
+
+       cpu_version {
+               reg=<0x0 0xff800220 0x0 0x4>;
+       };
+
+       meson_clk_msr {
+               compatible = "amlogic, gxl_measure";
+               reg = <0x0 0xffd18004 0x0 0x4
+                      0x0 0xffd1800c 0x0 0x4>;
+       };
+
+
+};/* end of / */
+
old mode 100644 (file)
new mode 100755 (executable)
index 15e6a96..c3d34ce
@@ -15,3 +15,5 @@ make ARCH=arm64 gxl_p400_2g.dtb || echo "Compile dtb Fail !!"
 make ARCH=arm64 gxl_p401_2g.dtb || echo "Compile dtb Fail !!"
 
 make ARCH=arm64 gxl_skt.dtb || echo "Compile dtb Fail !!"
+
+make ARCH=arm64 axg_pxp.dtb || echo "Compile dtb Fail !!"