p241: dts: fix cvbsout & vdac config mistake
authorEvoke Zhang <evoke.zhang@amlogic.com>
Wed, 7 Mar 2018 03:21:34 +0000 (11:21 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 12 Mar 2018 04:37:42 +0000 (20:37 -0800)
PD#161357: p241: dts: fix cvbsout & vdac config mistake

Change-Id: Iff6c1ec0aec505a0e93ba2302a3c9ee419b23de5
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
arch/arm64/boot/dts/amlogic/gxl_p241_1g_buildroot.dts
arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts
arch/arm64/boot/dts/amlogic/gxl_p241_v2_1g_buildroot.dts

index 3b5705c..0e0f128 100644 (file)
                compatible = "amlogic, vdac";
                dev_name = "vdac";
                status = "okay";
-               clocks = <&clkc CLKID_DAC_CLK>;
-               clock-names = "vdac_clk";
-       };
-
-       vdac {
-               compatible = "amlogic, vdac";
-               dev_name = "vdac";
-               status = "okay";
        };
 
        cvbsout {
index 941676a..a6bef3e 100644 (file)
                fr_auto_policy = <0>;
        };
 
+       vdac {
+               compatible = "amlogic, vdac";
+               dev_name = "vdac";
+               status = "okay";
+       };
+
        cvbsout {
-               compatible = "amlogic, cvbsout";
+               compatible = "amlogic, cvbsout-gxl";
                dev_name = "cvbsout";
                status = "okay";
+               clocks = <&clkc CLKID_VCLK2_ENCI
+                       &clkc CLKID_VCLK2_VENCI0
+                       &clkc CLKID_VCLK2_VENCI1
+                       &clkc CLKID_DAC_CLK>;
+               clock-names = "venci_top_gate",
+                       "venci_0_gate",
+                       "venci_1_gate",
+                       "vdac_clk_gate";
+
+               /* performance: reg_address, reg_value */
+               /* s805x */
+               performance = <0x1bf0  0x9
+                       0x1b56  0x343
+                       0x1b12  0x8080
+                       0x1b05  0xfd
+                       0x1c59  0xf752
+                       0xffff  0x0>; /* ending flag */
        };
 
        amhdmitx: amhdmitx{
index 5f83315..00cda74 100644 (file)
                fr_auto_policy = <0>;
        };
 
+       vdac {
+               compatible = "amlogic, vdac";
+               dev_name = "vdac";
+               status = "okay";
+       };
+
        cvbsout {
-               compatible = "amlogic, cvbsout";
+               compatible = "amlogic, cvbsout-gxl";
                dev_name = "cvbsout";
                status = "okay";
+               clocks = <&clkc CLKID_VCLK2_ENCI
+                       &clkc CLKID_VCLK2_VENCI0
+                       &clkc CLKID_VCLK2_VENCI1
+                       &clkc CLKID_DAC_CLK>;
+               clock-names = "venci_top_gate",
+                       "venci_0_gate",
+                       "venci_1_gate",
+                       "vdac_clk_gate";
+
+               /* performance: reg_address, reg_value */
+               /* s805x */
+               performance = <0x1bf0  0x9
+                       0x1b56  0x343
+                       0x1b12  0x8080
+                       0x1b05  0xfd
+                       0x1c59  0xf752
+                       0xffff  0x0>; /* ending flag */
        };
 
        amhdmitx: amhdmitx{