x86/debug: Support negative polarity DR6 bits
authorPeter Zijlstra <peterz@infradead.org>
Wed, 2 Sep 2020 13:26:01 +0000 (15:26 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 4 Sep 2020 13:12:57 +0000 (15:12 +0200)
DR6 has a whole bunch of bits that have negative polarity; they were
architecturally reserved and defined to be 1 and are now getting used.
Since they're 1 by default, 0 becomes the signal value.

Handle this by xor'ing the read DR6 value by the reserved mask, this
will flip them around such that 1 is the signal value (positive
polarity).

Current Linux doesn't yet support any of these bits, but there's two
defined:

 - DR6[11] Bus Lock Debug Exception (ISEr39)
 - DR6[16] Restricted Transactional Memory (SDM)

Update ptrace_{set,get}_debugreg() to provide/consume the value in
architectural polarity. Although afaict ptrace_set_debugreg(6) is
pointless, the value is not consumed anywhere.

Change hw_breakpoint_restore() to alway write the DR6_RESERVED value
to DR6, again, no consumer for that write.

Suggested-by: Andrew Cooper <Andrew.Cooper3@citrix.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Link: https://lore.kernel.org/r/20200902133201.354220797@infradead.org
arch/x86/kernel/hw_breakpoint.c
arch/x86/kernel/ptrace.c
arch/x86/kernel/traps.c

index 7b7d9f2..d17a1da 100644 (file)
@@ -464,7 +464,7 @@ void hw_breakpoint_restore(void)
        set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
        set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
        set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
-       set_debugreg(current->thread.debugreg6, 6);
+       set_debugreg(DR6_RESERVED, 6);
        set_debugreg(__this_cpu_read(cpu_dr7), 7);
 }
 EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
index e7537c5..5f98289 100644 (file)
@@ -601,7 +601,7 @@ static unsigned long ptrace_get_debugreg(struct task_struct *tsk, int n)
                if (bp)
                        val = bp->hw.info.address;
        } else if (n == 6) {
-               val = thread->debugreg6;
+               val = thread->debugreg6 ^ DR6_RESERVED; /* Flip back to arch polarity */
        } else if (n == 7) {
                val = thread->ptrace_dr7;
        }
@@ -657,7 +657,7 @@ static int ptrace_set_debugreg(struct task_struct *tsk, int n,
        if (n < HBP_NUM) {
                rc = ptrace_set_breakpoint_addr(tsk, n, val);
        } else if (n == 6) {
-               thread->debugreg6 = val;
+               thread->debugreg6 = val ^ DR6_RESERVED; /* Flip to positive polarity */
                rc = 0;
        } else if (n == 7) {
                rc = ptrace_write_dr7(tsk, val);
index 1e89001..114515b 100644 (file)
@@ -745,9 +745,8 @@ static __always_inline unsigned long debug_read_clear_dr6(void)
         * Keep it simple: clear DR6 immediately.
         */
        get_debugreg(dr6, 6);
-       set_debugreg(0, 6);
-       /* Filter out all the reserved bits which are preset to 1 */
-       dr6 &= ~DR6_RESERVED;
+       set_debugreg(DR6_RESERVED, 6);
+       dr6 ^= DR6_RESERVED; /* Flip to positive polarity */
 
        /*
         * The SDM says "The processor clears the BTF flag when it