clk: samsung: Add clk ID definitions for the CPU parent clocks
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Wed, 26 Aug 2020 17:15:27 +0000 (19:15 +0200)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 17 Sep 2020 10:05:15 +0000 (12:05 +0200)
Add clock ID definitions for the CPU parent clocks for SoCs
which don't have such definitions yet. This will allow us to
reference the parent clocks directly by cached struct clk_hw
pointers in the clock provider, rather than doing clk lookup
by name.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200826171529.23618-1-s.nawrocki@samsung.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
include/dt-bindings/clock/exynos5250.h
include/dt-bindings/clock/exynos5420.h

index bc8a3c5..e259cc0 100644 (file)
 #define CLK_MOUT_GPLL          1025
 #define CLK_MOUT_ACLK200_DISP1_SUB     1026
 #define CLK_MOUT_ACLK300_DISP1_SUB     1027
+#define CLK_MOUT_APLL          1028
+#define CLK_MOUT_MPLL          1029
 
 /* must be greater than maximal clock id */
-#define CLK_NR_CLKS            1028
+#define CLK_NR_CLKS            1030
 
 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */
index ff917c8..9fffc6c 100644 (file)
 #define CLK_MOUT_SCLK_SPLL     660
 #define CLK_MOUT_MX_MSPLL_CCORE_PHY    661
 #define CLK_MOUT_SW_ACLK_G3D   662
+#define CLK_MOUT_APLL          663
+#define CLK_MOUT_MSPLL_CPU     664
+#define CLK_MOUT_KPLL          665
+#define CLK_MOUT_MSPLL_KFC     666
+
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL         768