; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zfh \
; RUN: -verify-machineinstrs -target-abi ilp32f | \
-; RUN: FileCheck -check-prefixes=CHECKIZFH,RV32IZFH %s
+; RUN: FileCheck -check-prefixes=CHECKIZFH,RV32IZFH,RV32IFZFH %s
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zfh \
; RUN: -verify-machineinstrs -target-abi lp64f | \
-; RUN: FileCheck -check-prefixes=CHECKIZFH,RV64IZFH %s
+; RUN: FileCheck -check-prefixes=CHECKIZFH,RV64IZFH,RV64IFZFH %s
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \
; RUN: -mattr=+zfh -verify-machineinstrs -target-abi ilp32d | \
-; RUN: FileCheck -check-prefix=RV32IDZFH %s
+; RUN: FileCheck -check-prefixes=CHECKIZFH,RV32IZFH,RV32IDZFH %s
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \
; RUN: -mattr=+zfh -verify-machineinstrs -target-abi lp64d | \
-; RUN: FileCheck -check-prefix=RV64IDZFH %s
+; RUN: FileCheck -check-prefixes=CHECKIZFH,RV64IZFH,RV64IDZFH %s
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 \
; RUN: -verify-machineinstrs | \
; RUN: FileCheck -check-prefix=RV32I %s
; CHECKIZFH-NEXT: fsqrt.h fa0, fa0
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: sqrt_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fsqrt.h fa0, fa0
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: sqrt_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fsqrt.h fa0, fa0
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: sqrt_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: powi_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call __powisf2@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: powi_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: sext.w a0, a0
-; RV64IDZFH-NEXT: call __powisf2@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: powi_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: sin_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call sinf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: sin_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call sinf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: sin_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: cos_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call cosf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: cos_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call cosf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: cos_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; The sin+cos combination results in an FSINCOS SelectionDAG node.
define half @sincos_f16(half %a) nounwind {
-; RV32IZFH-LABEL: sincos_f16:
-; RV32IZFH: # %bb.0:
-; RV32IZFH-NEXT: addi sp, sp, -16
-; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
-; RV32IZFH-NEXT: fsw fs1, 4(sp) # 4-byte Folded Spill
-; RV32IZFH-NEXT: fcvt.s.h fs0, fa0
-; RV32IZFH-NEXT: fmv.s fa0, fs0
-; RV32IZFH-NEXT: call sinf@plt
-; RV32IZFH-NEXT: fcvt.h.s fs1, fa0
-; RV32IZFH-NEXT: fmv.s fa0, fs0
-; RV32IZFH-NEXT: call cosf@plt
-; RV32IZFH-NEXT: fcvt.h.s ft0, fa0
-; RV32IZFH-NEXT: fadd.h fa0, fs1, ft0
-; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
-; RV32IZFH-NEXT: flw fs1, 4(sp) # 4-byte Folded Reload
-; RV32IZFH-NEXT: addi sp, sp, 16
-; RV32IZFH-NEXT: ret
-;
-; RV64IZFH-LABEL: sincos_f16:
-; RV64IZFH: # %bb.0:
-; RV64IZFH-NEXT: addi sp, sp, -16
-; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
-; RV64IZFH-NEXT: fsw fs1, 0(sp) # 4-byte Folded Spill
-; RV64IZFH-NEXT: fcvt.s.h fs0, fa0
-; RV64IZFH-NEXT: fmv.s fa0, fs0
-; RV64IZFH-NEXT: call sinf@plt
-; RV64IZFH-NEXT: fcvt.h.s fs1, fa0
-; RV64IZFH-NEXT: fmv.s fa0, fs0
-; RV64IZFH-NEXT: call cosf@plt
-; RV64IZFH-NEXT: fcvt.h.s ft0, fa0
-; RV64IZFH-NEXT: fadd.h fa0, fs1, ft0
-; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
-; RV64IZFH-NEXT: flw fs1, 0(sp) # 4-byte Folded Reload
-; RV64IZFH-NEXT: addi sp, sp, 16
-; RV64IZFH-NEXT: ret
+; RV32IFZFH-LABEL: sincos_f16:
+; RV32IFZFH: # %bb.0:
+; RV32IFZFH-NEXT: addi sp, sp, -16
+; RV32IFZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IFZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
+; RV32IFZFH-NEXT: fsw fs1, 4(sp) # 4-byte Folded Spill
+; RV32IFZFH-NEXT: fcvt.s.h fs0, fa0
+; RV32IFZFH-NEXT: fmv.s fa0, fs0
+; RV32IFZFH-NEXT: call sinf@plt
+; RV32IFZFH-NEXT: fcvt.h.s fs1, fa0
+; RV32IFZFH-NEXT: fmv.s fa0, fs0
+; RV32IFZFH-NEXT: call cosf@plt
+; RV32IFZFH-NEXT: fcvt.h.s ft0, fa0
+; RV32IFZFH-NEXT: fadd.h fa0, fs1, ft0
+; RV32IFZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IFZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
+; RV32IFZFH-NEXT: flw fs1, 4(sp) # 4-byte Folded Reload
+; RV32IFZFH-NEXT: addi sp, sp, 16
+; RV32IFZFH-NEXT: ret
+;
+; RV64IFZFH-LABEL: sincos_f16:
+; RV64IFZFH: # %bb.0:
+; RV64IFZFH-NEXT: addi sp, sp, -16
+; RV64IFZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IFZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
+; RV64IFZFH-NEXT: fsw fs1, 0(sp) # 4-byte Folded Spill
+; RV64IFZFH-NEXT: fcvt.s.h fs0, fa0
+; RV64IFZFH-NEXT: fmv.s fa0, fs0
+; RV64IFZFH-NEXT: call sinf@plt
+; RV64IFZFH-NEXT: fcvt.h.s fs1, fa0
+; RV64IFZFH-NEXT: fmv.s fa0, fs0
+; RV64IFZFH-NEXT: call cosf@plt
+; RV64IFZFH-NEXT: fcvt.h.s ft0, fa0
+; RV64IFZFH-NEXT: fadd.h fa0, fs1, ft0
+; RV64IFZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IFZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
+; RV64IFZFH-NEXT: flw fs1, 0(sp) # 4-byte Folded Reload
+; RV64IFZFH-NEXT: addi sp, sp, 16
+; RV64IFZFH-NEXT: ret
;
; RV32IDZFH-LABEL: sincos_f16:
; RV32IDZFH: # %bb.0:
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: pow_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: fcvt.s.h fa1, fa1
-; RV32IDZFH-NEXT: call powf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: pow_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: fcvt.s.h fa1, fa1
-; RV64IDZFH-NEXT: call powf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: pow_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: exp_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call expf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: exp_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call expf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: exp_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: exp2_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call exp2f@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: exp2_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call exp2f@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: exp2_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: log_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call logf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: log_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call logf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: log_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: log10_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call log10f@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: log10_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call log10f@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: log10_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: log2_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call log2f@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: log2_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call log2f@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: log2_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; CHECKIZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: fma_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: fma_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: fma_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -32
; CHECKIZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: fmuladd_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: fmuladd_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fmadd.h fa0, fa0, fa1, fa2
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: fmuladd_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -32
; CHECKIZFH-NEXT: fabs.h fa0, fa0
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: fabs_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fabs.h fa0, fa0
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: fabs_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fabs.h fa0, fa0
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: fabs_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a0, a0, 17
; CHECKIZFH-NEXT: fmin.h fa0, fa0, fa1
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: minnum_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fmin.h fa0, fa0, fa1
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: minnum_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fmin.h fa0, fa0, fa1
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: minnum_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; CHECKIZFH-NEXT: fmax.h fa0, fa0, fa1
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: maxnum_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fmax.h fa0, fa0, fa1
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: maxnum_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fmax.h fa0, fa0, fa1
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: maxnum_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; CHECKIZFH-NEXT: fsgnj.h fa0, fa0, fa1
; CHECKIZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: copysign_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: fsgnj.h fa0, fa0, fa1
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: copysign_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: fsgnj.h fa0, fa0, fa1
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: copysign_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a2, 1048568
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: floor_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call floorf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: floor_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call floorf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: floor_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: ceil_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call ceilf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: ceil_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call ceilf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: ceil_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: trunc_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call truncf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: trunc_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call truncf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: trunc_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: rint_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call rintf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: rint_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call rintf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: rint_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: nearbyint_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call nearbyintf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: nearbyint_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call nearbyintf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: nearbyint_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: round_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call roundf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: round_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call roundf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: round_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret
;
-; RV32IDZFH-LABEL: roundeven_f16:
-; RV32IDZFH: # %bb.0:
-; RV32IDZFH-NEXT: addi sp, sp, -16
-; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV32IDZFH-NEXT: call roundevenf@plt
-; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IDZFH-NEXT: addi sp, sp, 16
-; RV32IDZFH-NEXT: ret
-;
-; RV64IDZFH-LABEL: roundeven_f16:
-; RV64IDZFH: # %bb.0:
-; RV64IDZFH-NEXT: addi sp, sp, -16
-; RV64IDZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
-; RV64IDZFH-NEXT: call roundevenf@plt
-; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
-; RV64IDZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IDZFH-NEXT: addi sp, sp, 16
-; RV64IDZFH-NEXT: ret
-;
; RV32I-LABEL: roundeven_f16:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16