define void @exp_averages_intraday__deviation() {
entry:
- %0 = load i32, i32* undef, align 4
+ %0 = load i32, ptr undef, align 4
%1 = shl i32 %0, 2
%2 = add nsw i32 undef, %1
%3 = add nsw i32 %2, undef
unreachable
"8": ; preds = %"4"
- %8 = getelementptr inbounds i8, i8* undef, i32 %6
+ %8 = getelementptr inbounds i8, ptr undef, i32 %6
br i1 undef, label %"13", label %"12"
"12": ; preds = %"8", %entry
define void @test3() {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* @b, align 4
-; CHECK-NEXT: [[C:%.*]] = load i32, i32* @c, align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr @a, align 4
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr @b, align 4
+; CHECK-NEXT: [[C:%.*]] = load i32, ptr @c, align 4
; CHECK-NEXT: [[T1:%.*]] = add i32 [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[C]]
-; CHECK-NEXT: store i32 [[T2]], i32* @e, align 4
-; CHECK-NEXT: store i32 [[T2]], i32* @f, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @e, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @f, align 4
; CHECK-NEXT: ret void
;
- %A = load i32, i32* @a
- %B = load i32, i32* @b
- %C = load i32, i32* @c
+ %A = load i32, ptr @a
+ %B = load i32, ptr @b
+ %C = load i32, ptr @c
%t1 = add i32 %A, %B
%t2 = add i32 %t1, %C
%t3 = add i32 %C, %A
%t4 = add i32 %t3, %B
; e = (a+b)+c;
- store i32 %t2, i32* @e
+ store i32 %t2, ptr @e
; f = (a+c)+b
- store i32 %t4, i32* @f
+ store i32 %t4, ptr @f
ret void
}
define void @test4() {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* @b, align 4
-; CHECK-NEXT: [[C:%.*]] = load i32, i32* @c, align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr @a, align 4
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr @b, align 4
+; CHECK-NEXT: [[C:%.*]] = load i32, ptr @c, align 4
; CHECK-NEXT: [[T1:%.*]] = add i32 [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[C]]
-; CHECK-NEXT: store i32 [[T2]], i32* @e, align 4
-; CHECK-NEXT: store i32 [[T2]], i32* @f, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @e, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @f, align 4
; CHECK-NEXT: ret void
;
- %A = load i32, i32* @a
- %B = load i32, i32* @b
- %C = load i32, i32* @c
+ %A = load i32, ptr @a
+ %B = load i32, ptr @b
+ %C = load i32, ptr @c
%t1 = add i32 %A, %B
%t2 = add i32 %t1, %C
%t3 = add i32 %C, %A
%t4 = add i32 %t3, %B
; e = c+(a+b)
- store i32 %t2, i32* @e
+ store i32 %t2, ptr @e
; f = (c+a)+b
- store i32 %t4, i32* @f
+ store i32 %t4, ptr @f
ret void
}
define void @test5() {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* @b, align 4
-; CHECK-NEXT: [[C:%.*]] = load i32, i32* @c, align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr @a, align 4
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr @b, align 4
+; CHECK-NEXT: [[C:%.*]] = load i32, ptr @c, align 4
; CHECK-NEXT: [[T1:%.*]] = add i32 [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[C]]
-; CHECK-NEXT: store i32 [[T2]], i32* @e, align 4
-; CHECK-NEXT: store i32 [[T2]], i32* @f, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @e, align 4
+; CHECK-NEXT: store i32 [[T2]], ptr @f, align 4
; CHECK-NEXT: ret void
;
- %A = load i32, i32* @a
- %B = load i32, i32* @b
- %C = load i32, i32* @c
+ %A = load i32, ptr @a
+ %B = load i32, ptr @b
+ %C = load i32, ptr @c
%t1 = add i32 %B, %A
%t2 = add i32 %t1, %C
%t3 = add i32 %C, %A
%t4 = add i32 %t3, %B
; e = c+(b+a)
- store i32 %t2, i32* @e
+ store i32 %t2, ptr @e
; f = (c+a)+b
- store i32 %t4, i32* @f
+ store i32 %t4, ptr @f
ret void
}
; CHECK-LABEL: @test6(
; CHECK-NEXT: ret i32 0
;
- %tmp.0 = load i32, i32* @a
- %tmp.1 = load i32, i32* @b
+ %tmp.0 = load i32, ptr @a
+ %tmp.1 = load i32, ptr @b
; (a+b)
%tmp.2 = add i32 %tmp.0, %tmp.1
- %tmp.4 = load i32, i32* @c
+ %tmp.4 = load i32, ptr @c
; (a+b)+c
%tmp.5 = add i32 %tmp.2, %tmp.4
; (a+c)
; PR5981
define i32 @test2() nounwind ssp {
entry:
- %0 = load i32, i32* undef, align 4
+ %0 = load i32, ptr undef, align 4
%1 = mul nsw i32 undef, %0
%2 = mul nsw i32 undef, %0
%3 = add nsw i32 undef, %1
; rdar://9096268
-define void @x66303361ae3f602889d1b7d0f86e5455(i8* %arg) nounwind {
+define void @x66303361ae3f602889d1b7d0f86e5455(ptr %arg) nounwind {
_:
br label %_33
_33: ; preds = %_33, %_
- %tmp348 = load i8, i8* %arg, align 1
+ %tmp348 = load i8, ptr %arg, align 1
%tmp349 = lshr i8 %tmp348, 7
%tmp350 = or i8 %tmp349, 42
%tmp351 = add i8 %tmp350, -42
; PR12963
@a = external global i8
define i8 @f0(i8 %x) {
- %t0 = load i8, i8* @a
+ %t0 = load i8, ptr @a
%t1 = mul i8 %x, %x
%t2 = mul i8 %t1, %t1
%t3 = mul i8 %t2, %t2
define float @undef1() {
; CHECK-LABEL: @undef1(
-; CHECK-NEXT: [[FACTOR1:%.*]] = fmul fast float -1.000000e+00, bitcast (i32 ptrtoint (i32* @g to i32) to float)
-; CHECK-NEXT: [[REASS_ADD:%.*]] = fadd fast float [[FACTOR1]], bitcast (i32 ptrtoint (i32* @g to i32) to float)
+; CHECK-NEXT: [[FACTOR1:%.*]] = fmul fast float -1.000000e+00, bitcast (i32 ptrtoint (ptr @g to i32) to float)
+; CHECK-NEXT: [[REASS_ADD:%.*]] = fadd fast float [[FACTOR1]], bitcast (i32 ptrtoint (ptr @g to i32) to float)
; CHECK-NEXT: [[REASS_MUL:%.*]] = fmul fast float [[REASS_ADD]], 2.000000e+00
; CHECK-NEXT: ret float [[REASS_MUL]]
;
- %t0 = fadd fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), bitcast (i32 ptrtoint (i32* @g to i32) to float)
- %t1 = fsub fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), %t0
- %t2 = fadd fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), %t1
+ %t0 = fadd fast float bitcast (i32 ptrtoint (ptr @g to i32) to float), bitcast (i32 ptrtoint (ptr @g to i32) to float)
+ %t1 = fsub fast float bitcast (i32 ptrtoint (ptr @g to i32) to float), %t0
+ %t2 = fadd fast float bitcast (i32 ptrtoint (ptr @g to i32) to float), %t1
ret float %t2
}
; CHECK-LABEL: @undef2(
; CHECK-NEXT: unreachable
;
- %t0 = fadd fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), bitcast (i32 ptrtoint (i32* @g to i32) to float)
+ %t0 = fadd fast float bitcast (i32 ptrtoint (ptr @g to i32) to float), bitcast (i32 ptrtoint (ptr @g to i32) to float)
%t1 = fadd fast float %t0, 1.0
%t2 = fsub fast float %t0, %t1
%t3 = fmul fast float %t2, 2.0
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP1:%.*]]
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], [[TMP3:%.*]]
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP4:%.*]]
-; CHECK-NEXT: store i32 [[TMP9]], i32* @num1, align 4
-; CHECK-NEXT: store i32 [[TMP6]], i32* @num2, align 4
+; CHECK-NEXT: store i32 [[TMP9]], ptr @num1, align 4
+; CHECK-NEXT: store i32 [[TMP6]], ptr @num2, align 4
; CHECK-NEXT: [[TMP10:%.*]] = add nsw i32 [[TMP3]], [[TMP1]]
-; CHECK-NEXT: store i32 [[TMP10]], i32* @num3, align 4
+; CHECK-NEXT: store i32 [[TMP10]], ptr @num3, align 4
; CHECK-NEXT: ret i32 undef
;
%6 = add i32 %2, %0
%7 = add i32 %6, %1
%8 = add i32 %7, %3
%9 = add i32 %8, %4
- store i32 %9, i32* @num1, align 4
+ store i32 %9, ptr @num1, align 4
%10 = add nsw i32 %2, %0
- store i32 %10, i32* @num2, align 4
+ store i32 %10, ptr @num2, align 4
%11 = add nsw i32 %3, %1
- store i32 %11, i32* @num3, align 4
+ store i32 %11, ptr @num3, align 4
ret i32 undef
}
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP2:%.*]], [[TMP1:%.*]]
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP0:%.*]]
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3:%.*]]
-; CHECK-NEXT: store i32 [[TMP7]], i32* @num1, align 4
-; CHECK-NEXT: store i32 [[TMP5]], i32* @num2, align 4
+; CHECK-NEXT: store i32 [[TMP7]], ptr @num1, align 4
+; CHECK-NEXT: store i32 [[TMP5]], ptr @num2, align 4
; CHECK-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP3]], [[TMP0]]
-; CHECK-NEXT: store i32 [[TMP8]], i32* @num3, align 4
+; CHECK-NEXT: store i32 [[TMP8]], ptr @num3, align 4
; CHECK-NEXT: ret i32 undef
;
%5 = add nsw i32 %0, %1
%6 = add nsw i32 %5, %2
%7 = add nsw i32 %6, %3
- store i32 %7, i32* @num1, align 4
+ store i32 %7, ptr @num1, align 4
%8 = add nsw i32 %1, %2
- store i32 %8, i32* @num2, align 4
+ store i32 %8, ptr @num2, align 4
%9 = add nsw i32 %0, %3
- store i32 %9, i32* @num3, align 4
+ store i32 %9, ptr @num3, align 4
ret i32 undef
}
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP1:%.*]]
; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP4:%.*]]
; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], [[TMP5:%.*]]
-; CHECK-NEXT: store i32 [[TMP11]], i32* @num1, align 4
+; CHECK-NEXT: store i32 [[TMP11]], ptr @num1, align 4
; CHECK-NEXT: [[TMP12:%.*]] = add nsw i32 [[TMP5]], [[TMP0]]
-; CHECK-NEXT: store i32 [[TMP12]], i32* @num2, align 4
+; CHECK-NEXT: store i32 [[TMP12]], ptr @num2, align 4
; CHECK-NEXT: [[TMP13:%.*]] = add nsw i32 [[TMP4]], [[TMP1]]
-; CHECK-NEXT: store i32 [[TMP13]], i32* @num3, align 4
-; CHECK-NEXT: store i32 [[TMP7]], i32* @num4, align 4
+; CHECK-NEXT: store i32 [[TMP13]], ptr @num3, align 4
+; CHECK-NEXT: store i32 [[TMP7]], ptr @num4, align 4
; CHECK-NEXT: ret i32 undef
;
%7 = add nsw i32 %0, %1
%9 = add nsw i32 %8, %3
%10 = add nsw i32 %9, %4
%11 = add nsw i32 %10, %5
- store i32 %11, i32* @num1, align 4
+ store i32 %11, ptr @num1, align 4
%12 = add nsw i32 %0, %5
- store i32 %12, i32* @num2, align 4
+ store i32 %12, ptr @num2, align 4
%13 = add nsw i32 %1, %4
- store i32 %13, i32* @num3, align 4
+ store i32 %13, ptr @num3, align 4
%14 = add nsw i32 %2, %3
- store i32 %14, i32* @num4, align 4
+ store i32 %14, ptr @num4, align 4
ret i32 undef
}
define void @test3() {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[A:%.*]] = load float, float* @fa, align 4
-; CHECK-NEXT: [[B:%.*]] = load float, float* @fb, align 4
-; CHECK-NEXT: [[C:%.*]] = load float, float* @fc, align 4
+; CHECK-NEXT: [[A:%.*]] = load float, ptr @fa, align 4
+; CHECK-NEXT: [[B:%.*]] = load float, ptr @fb, align 4
+; CHECK-NEXT: [[C:%.*]] = load float, ptr @fc, align 4
; CHECK-NEXT: [[T1:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = fadd fast float [[T1]], [[C]]
; CHECK-NEXT: [[T3:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T4:%.*]] = fadd fast float [[T3]], [[C]]
-; CHECK-NEXT: store float [[T2]], float* @fe, align 4
-; CHECK-NEXT: store float [[T4]], float* @ff, align 4
+; CHECK-NEXT: store float [[T2]], ptr @fe, align 4
+; CHECK-NEXT: store float [[T4]], ptr @ff, align 4
; CHECK-NEXT: ret void
;
- %A = load float, float* @fa
- %B = load float, float* @fb
- %C = load float, float* @fc
+ %A = load float, ptr @fa
+ %B = load float, ptr @fb
+ %C = load float, ptr @fc
%t1 = fadd fast float %A, %B
%t2 = fadd fast float %t1, %C
%t3 = fadd fast float %A, %C
%t4 = fadd fast float %t3, %B
; e = (a+b)+c;
- store float %t2, float* @fe
+ store float %t2, ptr @fe
; f = (a+c)+b
- store float %t4, float* @ff
+ store float %t4, ptr @ff
ret void
}
define void @test4() {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[A:%.*]] = load float, float* @fa, align 4
-; CHECK-NEXT: [[B:%.*]] = load float, float* @fb, align 4
-; CHECK-NEXT: [[C:%.*]] = load float, float* @fc, align 4
+; CHECK-NEXT: [[A:%.*]] = load float, ptr @fa, align 4
+; CHECK-NEXT: [[B:%.*]] = load float, ptr @fb, align 4
+; CHECK-NEXT: [[C:%.*]] = load float, ptr @fc, align 4
; CHECK-NEXT: [[T1:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = fadd fast float [[T1]], [[C]]
; CHECK-NEXT: [[T3:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T4:%.*]] = fadd fast float [[T3]], [[C]]
-; CHECK-NEXT: store float [[T2]], float* @fe, align 4
-; CHECK-NEXT: store float [[T4]], float* @ff, align 4
+; CHECK-NEXT: store float [[T2]], ptr @fe, align 4
+; CHECK-NEXT: store float [[T4]], ptr @ff, align 4
; CHECK-NEXT: ret void
;
- %A = load float, float* @fa
- %B = load float, float* @fb
- %C = load float, float* @fc
+ %A = load float, ptr @fa
+ %B = load float, ptr @fb
+ %C = load float, ptr @fc
%t1 = fadd fast float %A, %B
%t2 = fadd fast float %C, %t1
%t3 = fadd fast float %C, %A
%t4 = fadd fast float %t3, %B
; e = c+(a+b)
- store float %t2, float* @fe
+ store float %t2, ptr @fe
; f = (c+a)+b
- store float %t4, float* @ff
+ store float %t4, ptr @ff
ret void
}
define void @test5() {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[A:%.*]] = load float, float* @fa, align 4
-; CHECK-NEXT: [[B:%.*]] = load float, float* @fb, align 4
-; CHECK-NEXT: [[C:%.*]] = load float, float* @fc, align 4
+; CHECK-NEXT: [[A:%.*]] = load float, ptr @fa, align 4
+; CHECK-NEXT: [[B:%.*]] = load float, ptr @fb, align 4
+; CHECK-NEXT: [[C:%.*]] = load float, ptr @fc, align 4
; CHECK-NEXT: [[T1:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T2:%.*]] = fadd fast float [[T1]], [[C]]
; CHECK-NEXT: [[T3:%.*]] = fadd fast float [[B]], [[A]]
; CHECK-NEXT: [[T4:%.*]] = fadd fast float [[T3]], [[C]]
-; CHECK-NEXT: store float [[T2]], float* @fe, align 4
-; CHECK-NEXT: store float [[T4]], float* @ff, align 4
+; CHECK-NEXT: store float [[T2]], ptr @fe, align 4
+; CHECK-NEXT: store float [[T4]], ptr @ff, align 4
; CHECK-NEXT: ret void
;
- %A = load float, float* @fa
- %B = load float, float* @fb
- %C = load float, float* @fc
+ %A = load float, ptr @fa
+ %B = load float, ptr @fb
+ %C = load float, ptr @fc
%t1 = fadd fast float %B, %A
%t2 = fadd fast float %C, %t1
%t3 = fadd fast float %C, %A
%t4 = fadd fast float %t3, %B
; e = c+(b+a)
- store float %t2, float* @fe
+ store float %t2, ptr @fe
; f = (c+a)+b
- store float %t4, float* @ff
+ store float %t4, ptr @ff
ret void
}
; CHECK-NOT: or i16
%inlinable_call = call i16 @fn1(), !dbg !7
%dbgless_instruction = or i16 %inlinable_call, 0
- store i16 %dbgless_instruction, i16* undef, align 1
+ store i16 %dbgless_instruction, ptr undef, align 1
unreachable
}
define void @fn3() !dbg !8 {
; CHECK-LABEL: @fn3
-; CHECK: load i16, i16* undef, align 2, !dbg ![[LOC2:[0-9]+]]
+; CHECK: load i16, ptr undef, align 2, !dbg ![[LOC2:[0-9]+]]
; CHECK-NOT: or i16
- %instruction = load i16, i16* undef, !dbg !9
+ %instruction = load i16, ptr undef, !dbg !9
%dbgless_instruction = or i16 %instruction, 0
- store i16 %dbgless_instruction, i16* undef, align 1
+ store i16 %dbgless_instruction, ptr undef, align 1
unreachable
}
; RUN: opt < %s -passes=reassociate -S | FileCheck %s
; Basic pattern where two contiguous i8 loads form a wider i16 load
-define i16 @p0_i8_i8_i16(i8* %ptr) {
+define i16 @p0_i8_i8_i16(ptr %ptr) {
; CHECK-LABEL: @p0_i8_i8_i16(
-; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[I2:%.*]] = load i8, i8* [[I]], align 1
+; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[I2:%.*]] = load i8, ptr [[I]], align 1
; CHECK-NEXT: [[I3:%.*]] = zext i8 [[I2]] to i16
; CHECK-NEXT: [[I4:%.*]] = shl i16 [[I3]], 8
-; CHECK-NEXT: [[I5:%.*]] = load i8, i8* [[PTR]], align 1
+; CHECK-NEXT: [[I5:%.*]] = load i8, ptr [[PTR]], align 1
; CHECK-NEXT: [[I6:%.*]] = zext i8 [[I5]] to i16
; CHECK-NEXT: [[I7:%.*]] = or i16 [[I4]], [[I6]]
; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
; CHECK-NEXT: ret i16 [[I8]]
;
- %i = getelementptr inbounds i8, i8* %ptr, i64 1
- %i2 = load i8, i8* %i
+ %i = getelementptr inbounds i8, ptr %ptr, i64 1
+ %i2 = load i8, ptr %i
%i3 = zext i8 %i2 to i16
%i4 = shl i16 %i3, 8
- %i5 = load i8, i8* %ptr
+ %i5 = load i8, ptr %ptr
%i6 = zext i8 %i5 to i16
%i7 = or i16 %i4, %i6
%i8 = add i16 %i7, 42
}
; Basic pattern where two contiguous i8 loads form a wider i16 load, with swapped endianness
-define i16 @p1_i8_i8_i16_swapped(i8* %ptr) {
+define i16 @p1_i8_i8_i16_swapped(ptr %ptr) {
; CHECK-LABEL: @p1_i8_i8_i16_swapped(
-; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[I2:%.*]] = zext i8 [[I]] to i16
; CHECK-NEXT: [[I3:%.*]] = shl i16 [[I2]], 8
-; CHECK-NEXT: [[I4:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 1
-; CHECK-NEXT: [[I5:%.*]] = load i8, i8* [[I4]], align 1
+; CHECK-NEXT: [[I4:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 1
+; CHECK-NEXT: [[I5:%.*]] = load i8, ptr [[I4]], align 1
; CHECK-NEXT: [[I6:%.*]] = zext i8 [[I5]] to i16
; CHECK-NEXT: [[I7:%.*]] = or i16 [[I3]], [[I6]]
; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
; CHECK-NEXT: ret i16 [[I8]]
;
- %i = load i8, i8* %ptr
+ %i = load i8, ptr %ptr
%i2 = zext i8 %i to i16
%i3 = shl i16 %i2, 8
- %i4 = getelementptr inbounds i8, i8* %ptr, i64 1
- %i5 = load i8, i8* %i4
+ %i4 = getelementptr inbounds i8, ptr %ptr, i64 1
+ %i5 = load i8, ptr %i4
%i6 = zext i8 %i5 to i16
%i7 = or i16 %i3, %i6
%i8 = add i16 %i7, 42
}
; Loads are spaced out by a bit, but we don't check for that.
-define i16 @p2(i8* %ptr) {
+define i16 @p2(ptr %ptr) {
; CHECK-LABEL: @p2(
-; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[I2:%.*]] = load i8, i8* [[I]], align 1
+; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[I2:%.*]] = load i8, ptr [[I]], align 1
; CHECK-NEXT: [[I3:%.*]] = zext i8 [[I2]] to i16
; CHECK-NEXT: [[I4:%.*]] = shl i16 [[I3]], 9
-; CHECK-NEXT: [[I5:%.*]] = load i8, i8* [[PTR]], align 1
+; CHECK-NEXT: [[I5:%.*]] = load i8, ptr [[PTR]], align 1
; CHECK-NEXT: [[I6:%.*]] = zext i8 [[I5]] to i16
; CHECK-NEXT: [[I7:%.*]] = or i16 [[I4]], [[I6]]
; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
; CHECK-NEXT: ret i16 [[I8]]
;
- %i = getelementptr inbounds i8, i8* %ptr, i64 1
- %i2 = load i8, i8* %i
+ %i = getelementptr inbounds i8, ptr %ptr, i64 1
+ %i2 = load i8, ptr %i
%i3 = zext i8 %i2 to i16
%i4 = shl i16 %i3, 9 ; wrong shift amount
- %i5 = load i8, i8* %ptr
+ %i5 = load i8, ptr %ptr
%i6 = zext i8 %i5 to i16
%i7 = or i16 %i4, %i6
%i8 = add i16 %i7, 42
}
; Both bytes are the same, but we don't check for that.
-define i16 @p3(i8* %ptr) {
+define i16 @p3(ptr %ptr) {
; CHECK-LABEL: @p3(
-; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[I2:%.*]] = zext i8 [[I]] to i16
; CHECK-NEXT: [[I3:%.*]] = shl i16 [[I2]], 8
; CHECK-NEXT: [[I4:%.*]] = or i16 [[I3]], [[I2]]
; CHECK-NEXT: [[I5:%.*]] = add i16 [[I4]], 42
; CHECK-NEXT: ret i16 [[I5]]
;
- %i = load i8, i8* %ptr
+ %i = load i8, ptr %ptr
%i2 = zext i8 %i to i16
%i3 = shl i16 %i2, 8
%i4 = or i16 %i3, %i2
; Negative tests, should be transformed.
; Low bits are not a load
-define i16 @n4(i8* %ptr) {
+define i16 @n4(ptr %ptr) {
; CHECK-LABEL: @n4(
-; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[I2:%.*]] = zext i8 [[I]] to i16
; CHECK-NEXT: [[I3:%.*]] = shl i16 [[I2]], 8
; CHECK-NEXT: [[I5:%.*]] = add i16 [[I3]], 84
; CHECK-NEXT: ret i16 [[I5]]
;
- %i = load i8, i8* %ptr
+ %i = load i8, ptr %ptr
%i2 = zext i8 %i to i16
%i3 = shl i16 %i2, 8
%i4 = or i16 %i3, 42 ; Second operand is bad
}
; Low bits are not a load
-define i16 @n5(i8* %ptr, i8 %lowbits) {
+define i16 @n5(ptr %ptr, i8 %lowbits) {
; CHECK-LABEL: @n5(
-; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[I2:%.*]] = zext i8 [[I]] to i16
; CHECK-NEXT: [[I3:%.*]] = shl i16 [[I2]], 8
; CHECK-NEXT: [[I4:%.*]] = zext i8 [[LOWBITS:%.*]] to i16
; CHECK-NEXT: [[I6:%.*]] = add i16 [[I5]], [[I3]]
; CHECK-NEXT: ret i16 [[I6]]
;
- %i = load i8, i8* %ptr
+ %i = load i8, ptr %ptr
%i2 = zext i8 %i to i16
%i3 = shl i16 %i2, 8
%i4 = zext i8 %lowbits to i16 ; base operand is bad
}
; High bits are not a load
-define i16 @n6(i8* %ptr, i8 %highbits) {
+define i16 @n6(ptr %ptr, i8 %highbits) {
; CHECK-LABEL: @n6(
-; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds i8, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: [[I4:%.*]] = shl i16 42, 8
-; CHECK-NEXT: [[I5:%.*]] = load i8, i8* [[PTR]], align 1
+; CHECK-NEXT: [[I5:%.*]] = load i8, ptr [[PTR]], align 1
; CHECK-NEXT: [[I6:%.*]] = zext i8 [[I5]] to i16
; CHECK-NEXT: [[I7:%.*]] = add i16 [[I4]], 42
; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], [[I6]]
; CHECK-NEXT: ret i16 [[I8]]
;
- %i = getelementptr inbounds i8, i8* %ptr, i64 1
- %i2 = load i8, i8* %i
+ %i = getelementptr inbounds i8, ptr %ptr, i64 1
+ %i2 = load i8, ptr %i
%i4 = shl i16 42, 8 ; base operand is bad
- %i5 = load i8, i8* %ptr
+ %i5 = load i8, ptr %ptr
%i6 = zext i8 %i5 to i16
%i7 = or i16 %i4, %i6
%i8 = add i16 %i7, 42
;
; RUN: opt < %s -passes=reassociate -S | FileCheck %s
; END.
-@.LC0 = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+@.LC0 = internal global [4 x i8] c"%d\0A\00" ; <ptr> [#uses=1]
-declare i32 @printf(i8*, ...)
+declare i32 @printf(ptr, ...)
; Check that (i+j) has been reassociated (i=reg115, j=reg116)
-define void @test(i32 %Num, i32* %Array) {
+define void @test(i32 %Num, ptr %Array) {
; CHECK-LABEL: @test(
; CHECK-NEXT: bb0:
; CHECK-NEXT: [[COND221:%.*]] = icmp eq i32 0, [[NUM:%.*]]
; CHECK-NEXT: [[REG117:%.*]] = phi i32 [ [[REG118:%.*]], [[BB4]] ], [ 0, [[BB3]] ]
; CHECK-NEXT: [[REG113:%.*]] = add i32 [[REG116]], [[REG115]]
; CHECK-NEXT: [[REG114:%.*]] = add i32 [[REG113]], [[REG117]]
-; CHECK-NEXT: [[CAST227:%.*]] = getelementptr [4 x i8], [4 x i8]* @.LC0, i64 0, i64 0
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 (i8*, ...) @printf(i8* [[CAST227]], i32 [[REG114]])
+; CHECK-NEXT: [[CAST227:%.*]] = getelementptr [4 x i8], ptr @.LC0, i64 0, i64 0
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 (ptr, ...) @printf(ptr [[CAST227]], i32 [[REG114]])
; CHECK-NEXT: [[REG118]] = add i32 [[REG117]], 1
; CHECK-NEXT: [[COND224:%.*]] = icmp ne i32 [[REG118]], [[NUM]]
; CHECK-NEXT: br i1 [[COND224]], label [[BB4]], label [[BB5]]
%reg117 = phi i32 [ %reg118, %bb4 ], [ 0, %bb3 ] ; <i32> [#uses=2]
%reg113 = add i32 %reg115, %reg117 ; <i32> [#uses=1]
%reg114 = add i32 %reg113, %reg116 ; <i32> [#uses=1]
- %cast227 = getelementptr [4 x i8], [4 x i8]* @.LC0, i64 0, i64 0 ; <i8*> [#uses=1]
- call i32 (i8*, ...) @printf( i8* %cast227, i32 %reg114 ) ; <i32>:0 [#uses=0]
+ %cast227 = getelementptr [4 x i8], ptr @.LC0, i64 0, i64 0 ; <ptr> [#uses=1]
+ call i32 (ptr, ...) @printf( ptr %cast227, i32 %reg114 ) ; <i32>:0 [#uses=0]
%reg118 = add i32 %reg117, 1 ; <i32> [#uses=2]
%cond224 = icmp ne i32 %reg118, %Num ; <i1> [#uses=1]
br i1 %cond224, label %bb4, label %bb5
define i32 @fn2() nounwind uwtable ssp {
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
%dec = add nsw i32 %0, -1
- store i32 %dec, i32* @a, align 4
- %1 = load i32, i32* @d, align 4
+ store i32 %dec, ptr @a, align 4
+ %1 = load i32, ptr @d, align 4
%sub = sub nsw i32 %dec, %1
- store i32 %sub, i32* @d, align 4
- %2 = load i32, i32* @a, align 4
+ store i32 %sub, ptr @d, align 4
+ %2 = load i32, ptr @a, align 4
%dec1 = add nsw i32 %2, -1
- store i32 %dec1, i32* @a, align 4
- %3 = load i32, i32* @d, align 4
+ store i32 %dec1, ptr @a, align 4
+ %3 = load i32, ptr @d, align 4
%sub2 = sub nsw i32 %dec1, %3
- store i32 %sub2, i32* @d, align 4
- %4 = load i32, i32* @a, align 4
+ store i32 %sub2, ptr @d, align 4
+ %4 = load i32, ptr @a, align 4
%dec3 = add nsw i32 %4, -1
- store i32 %dec3, i32* @a, align 4
- %5 = load i32, i32* @d, align 4
+ store i32 %dec3, ptr @a, align 4
+ %5 = load i32, ptr @d, align 4
%sub4 = sub nsw i32 %dec3, %5
- store i32 %sub4, i32* @d, align 4
- %6 = load i32, i32* @a, align 4
+ store i32 %sub4, ptr @d, align 4
+ %6 = load i32, ptr @a, align 4
%dec5 = add nsw i32 %6, -1
- store i32 %dec5, i32* @a, align 4
- %7 = load i32, i32* @d, align 4
+ store i32 %dec5, ptr @a, align 4
+ %7 = load i32, ptr @d, align 4
%sub6 = sub nsw i32 %dec5, %7
- store i32 %sub6, i32* @d, align 4
- %8 = load i32, i32* @a, align 4
+ store i32 %sub6, ptr @d, align 4
+ %8 = load i32, ptr @a, align 4
%dec7 = add nsw i32 %8, -1
- store i32 %dec7, i32* @a, align 4
- %9 = load i32, i32* @d, align 4
+ store i32 %dec7, ptr @a, align 4
+ %9 = load i32, ptr @d, align 4
%sub8 = sub nsw i32 %dec7, %9
- store i32 %sub8, i32* @d, align 4
+ store i32 %sub8, ptr @d, align 4
ret i32 0
}
define i32 @test1() {
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
%conv = sitofp i32 %0 to float
%sub = fsub fast float %conv, undef
%sub1 = fadd fast float %sub, -1.000000e+00
%conv2 = fptosi float %sub1 to i32
- store i32 %conv2, i32* @b, align 4
+ store i32 %conv2, ptr @b, align 4
ret i32 undef
}
; aggressive with retrying instructions it's possible to invalidate our
; iterator. See PR28367 for complete details.
-define void @fn1(i32 %a, i1 %c, i32* %ptr) {
+define void @fn1(i32 %a, i1 %c, ptr %ptr) {
entry:
br label %for.cond
%dead2 = mul i32 %dead1, 3
%dead3 = mul i32 %dead2, %sub1
%sub2 = sub nsw i32 0, %d.0
- store i32 %sub2, i32* %ptr, align 4
+ store i32 %sub2, ptr %ptr, align 4
br label %for.cond
for.end:
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc19.11.0"
-define dso_local void @"?f@@YAX_N@Z"(i1 %b) local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define dso_local void @"?f@@YAX_N@Z"(i1 %b) local_unnamed_addr #0 personality ptr @__CxxFrameHandler3 {
entry:
br i1 %b, label %if.then, label %if.else
%0 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %0 [i8* null, i32 64, i8* null]
+ %1 = catchpad within %0 [ptr null, i32 64, ptr null]
%blech = sub nsw i32 5, %z.0
%sub = sub nsw i32 %blech, %z.0
call void @"?use@@YAXHH@Z"(i32 %z.0, i32 %sub) [ "funclet"(token %1) ]
ret i16 0
}
-define void @main(i16 %argc, i16** %argv) #0 {
+define void @main(i16 %argc, ptr %argv) #0 {
%_tmp0 = call i16 @func1()
%_tmp2 = zext i16 %_tmp0 to i32
ret void
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-%"lp.2234.4378.7378.12512.15079.17646.20213.22780.25347.27914.40747.53580.74113.76680.86947.89514.92081.94648.115163.130561" = type { i8*, i32 }
-%__type_info.2235.4379.7379.12513.15080.17647.20214.22781.25348.27915.40748.53581.74114.76681.86948.89515.92082.94649.115162.130560 = type { i64*, i8* }
+%"lp.2234.4378.7378.12512.15079.17646.20213.22780.25347.27914.40747.53580.74113.76680.86947.89514.92081.94648.115163.130561" = type { ptr, i32 }
+%__type_info.2235.4379.7379.12513.15080.17647.20214.22781.25348.27915.40748.53581.74114.76681.86948.89515.92082.94649.115162.130560 = type { ptr, ptr }
declare i32 @__gxx_personality_v0(...)
declare void @b() #0
-define void @a() #0 personality i32 (...)* @__gxx_personality_v0 {
+define void @a() #0 personality ptr @__gxx_personality_v0 {
", bb1":
invoke void @b()
to label %invoke.cont unwind label %"bb22"
%"$time_1_P14.0" = phi i64 [ undef, %", bb8" ], [ undef, %", bb1" ]
%0 = landingpad %"lp.2234.4378.7378.12512.15079.17646.20213.22780.25347.27914.40747.53580.74113.76680.86947.89514.92081.94648.115163.130561"
cleanup
- catch %__type_info.2235.4379.7379.12513.15080.17647.20214.22781.25348.27915.40748.53581.74114.76681.86948.89515.92082.94649.115162.130560* null
+ catch ptr null
%r79 = sub i64 0, %"$time_1_P14.0"
%r81 = add i64 %r79, undef
%r93 = add i64 %r81, undef
; Check that reassociate pass now salvages debug info when dropping instructions.
-define hidden i32 @main(i32 %argc, i8** %argv) {
+define hidden i32 @main(i32 %argc, ptr %argv) {
entry:
; CHECK: call void @llvm.dbg.value(metadata i32 %argc, metadata [[VAR_B:![0-9]+]], metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value))
%add = add nsw i32 %argc, 1, !dbg !26
; CHECK-NOT: undef
; CHECK: }
-define void @x0f2f640ab6718391b59ce96d9fdeda54(i32 %arg, i32 %arg1, i32 %arg2, i32* %.out) nounwind {
+define void @x0f2f640ab6718391b59ce96d9fdeda54(i32 %arg, i32 %arg1, i32 %arg2, ptr %.out) nounwind {
_:
%tmp = sub i32 %arg, %arg1
%tmp3 = mul i32 %tmp, -1268345047
%tmp6 = sub i32 %tmp4, %tmp5
%tmp7 = sub i32 -2014710503, %tmp3
%tmp8 = add i32 %tmp6, %tmp7
- store i32 %tmp8, i32* %.out
+ store i32 %tmp8, ptr %.out
ret void
}
define i32 @func(i32 %dummy, ...) {
;
; CHECK-LABEL: @func(
-; CHECK-NEXT: [[VARARGS:%.*]] = alloca i8*, align 8
-; CHECK-NEXT: [[VARARGS1:%.*]] = bitcast i8** [[VARARGS]] to i8*
-; CHECK-NEXT: call void @llvm.va_start(i8* [[VARARGS1]])
-; CHECK-NEXT: [[V0:%.*]] = va_arg i8** [[VARARGS]], i32
-; CHECK-NEXT: [[V1:%.*]] = va_arg i8** [[VARARGS]], i32
+; CHECK-NEXT: [[VARARGS:%.*]] = alloca ptr, align 8
+; CHECK-NEXT: call void @llvm.va_start(ptr [[VARARGS]])
+; CHECK-NEXT: [[V0:%.*]] = va_arg ptr [[VARARGS]], i32
+; CHECK-NEXT: [[V1:%.*]] = va_arg ptr [[VARARGS]], i32
; CHECK-NEXT: [[V0_NEG:%.*]] = sub i32 0, [[V0]]
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[V0_NEG]], 1
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[V1]]
-; CHECK-NEXT: call void @llvm.va_end(i8* [[VARARGS1]])
+; CHECK-NEXT: call void @llvm.va_end(ptr [[VARARGS]])
; CHECK-NEXT: ret i32 [[ADD]]
;
- %varargs = alloca i8*, align 8
- %varargs1 = bitcast i8** %varargs to i8*
- call void @llvm.va_start(i8* %varargs1)
- %v0 = va_arg i8** %varargs, i32
- %v1 = va_arg i8** %varargs, i32
+ %varargs = alloca ptr, align 8
+ call void @llvm.va_start(ptr %varargs)
+ %v0 = va_arg ptr %varargs, i32
+ %v1 = va_arg ptr %varargs, i32
%sub = sub nsw i32 %v1, %v0
%add = add nsw i32 %sub, 1
- call void @llvm.va_end(i8* %varargs1)
+ call void @llvm.va_end(ptr %varargs)
ret i32 %add
}
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start(ptr)
+declare void @llvm.va_end(ptr)
@xor_bug1_data = external global <{}>, align 4
define void @xor_bug1() {
; CHECK-LABEL: @xor_bug1(
-; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* undef to i64
-; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], ptrtoint (<{}>* @xor_bug1_data to i64)
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr undef to i64
+; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], ptrtoint (ptr @xor_bug1_data to i64)
; CHECK-NEXT: ret void
;
- %1 = ptrtoint i32* undef to i64
- %2 = xor i64 %1, ptrtoint (<{}>* @xor_bug1_data to i64)
+ %1 = ptrtoint ptr undef to i64
+ %2 = xor i64 %1, ptrtoint (ptr @xor_bug1_data to i64)
%3 = and i64 undef, %2
ret void
}