;
; IR: %[[A:[.a-zA-Z0-9]*]] = zext i32 %a to i64
; IR-NEXT: %[[B:[.a-zA-Z0-9]*]] = zext i32 %b to i64
-; IR-NEXT: %[[R0:[.a-zA-Z0-9]*]] = icmp ugt i64 %[[B]], 1
-; IR-NEXT: %[[R1:[.a-zA-Z0-9]*]] = select i1 %[[R0]], i64 %[[B]], i64 1
+; IR-NEXT: %[[R1:[.a-zA-Z0-9]*]] = call i64 @llvm.umax.i64(i64 %[[B]], i64 1)
; IR-NEXT: %[[R2:[.a-zA-Z0-9]*]] = udiv i64 %[[A]], %[[R1]]
; IR-NEXT: %[[C:[.a-zA-Z0-9]*]] = zext i32 %c to i64
; IR-NEXT: %[[D:[.a-zA-Z0-9]*]] = zext i32 %d to i64
-; IR-NEXT: %[[R5:[.a-zA-Z0-9]*]] = icmp ugt i64 %[[D]], 1
-; IR-NEXT: %[[R6:[.a-zA-Z0-9]*]] = select i1 %[[R5]], i64 %[[D]], i64 1
+; IR-NEXT: %[[R6:[.a-zA-Z0-9]*]] = call i64 @llvm.umax.i64(i64 %[[D]], i64 1)
; IR-NEXT: %[[R7:[.a-zA-Z0-9]*]] = udiv i64 %[[C]], %[[R6]]
-; IR-NEXT: %[[R3:[.a-zA-Z0-9]*]] = icmp ugt i64 %[[R7]], 1
-; IR-NEXT: %[[R4:[.a-zA-Z0-9]*]] = select i1 %[[R3]], i64 %[[R7]], i64 1
+; IR-NEXT: %[[R4:[.a-zA-Z0-9]*]] = call i64 @llvm.umax.i64(i64 %[[R7]], i64 1)
; IR-NEXT: %[[R8:[.a-zA-Z0-9]*]] = udiv i64 %[[R2]], %[[R4]]
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; CHECK: entry:
; CHECK-NEXT: %outvalue.141.phiops = alloca i64
; CHECK-NEXT: %.preload.s2a = alloca i8
-; CHECK-NEXT: %divpolly = sdiv i32 undef, 1
+; CHECK-NEXT: %umax = call i32 @llvm.umax.i32(i32 undef, i32 1)
+; CHECK-NEXT: %divpolly = sdiv i32 undef, %umax
; CHECK-NEXT: %div = sdiv i32 undef, undef
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"