#include "mpc85xx.h"
-#ifdef CONFIG_PPC_I8259
static void mpc85xx_8259_cascade(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
}
chip->irq_eoi(&desc->irq_data);
}
-#endif /* CONFIG_PPC_I8259 */
-void __init mpc85xx_ds_pic_init(void)
+static void __init mpc85xx_8259_init(void)
{
- struct mpic *mpic;
- int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU;
-#ifdef CONFIG_PPC_I8259
struct device_node *np;
struct device_node *cascade_node = NULL;
int cascade_irq;
-#endif
- if (of_machine_is_compatible("fsl,MPC8572DS-CAMP"))
- flags |= MPIC_NO_RESET;
-
- mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
-
- if (WARN_ON(!mpic))
+ if (!IS_ENABLED(CONFIG_PPC_I8259))
return;
- mpic_init(mpic);
-
-#ifdef CONFIG_PPC_I8259
/* Initialize the i8259 controller */
for_each_node_by_type(np, "interrupt-controller")
if (of_device_is_compatible(np, "chrp,iic")) {
of_node_put(cascade_node);
irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
-#endif /* CONFIG_PPC_I8259 */
+}
+
+void __init mpc85xx_ds_pic_init(void)
+{
+ struct mpic *mpic;
+ int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU;
+
+ if (of_machine_is_compatible("fsl,MPC8572DS-CAMP"))
+ flags |= MPIC_NO_RESET;
+
+ mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
+
+ if (WARN_ON(!mpic))
+ return;
+
+ mpic_init(mpic);
+
+ mpc85xx_8259_init();
}
/*