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net/mlx5: Set out of order (ooo) by default
author
Or Har-Toov
<ohartoov@nvidia.com>
Sun, 19 Mar 2023 12:59:32 +0000
(14:59 +0200)
committer
Leon Romanovsky
<leon@kernel.org>
Thu, 23 Mar 2023 08:21:13 +0000
(10:21 +0200)
When FW supports ooo by default, enable the cap.
Signed-off-by: Or Har-Toov <ohartoov@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Link:
https://lore.kernel.org/r/00bd14bfb002ed2338de3296bcd9af27d4770b70.1679230449.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/main.c
patch
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blob
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diff --git
a/drivers/net/ethernet/mellanox/mlx5/core/main.c
b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index
f1de152
..
9194f03
100644
(file)
--- a/
drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/
drivers/net/ethernet/mellanox/mlx5/core/main.c
@@
-684,6
+684,9
@@
static int handle_hca_cap_roce(struct mlx5_core_dev *dev, void *set_ctx)
MLX5_ST_SZ_BYTES(roce_cap));
MLX5_SET(roce_cap, set_hca_cap, sw_r_roce_src_udp_port, 1);
+ if (MLX5_CAP_ROCE_MAX(dev, qp_ooo_transmit_default))
+ MLX5_SET(roce_cap, set_hca_cap, qp_ooo_transmit_default, 1);
+
err = set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ROCE);
return err;
}