AMDGPU: Fix missing skipFunction calls

llvm-svn: 315361

diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
index 46e58a2ca5f746fc071600f32ca050cc341451db..4c991c7c21a5b29a6dd4e0cda8784a28602615fd 100644 (file)
--- a/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
@@ -205,6 +205,9 @@ static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg) {
 }
 
 bool SIOptimizeExecMasking::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   const SISubtarget &ST = MF.getSubtarget<SISubtarget>();
   const SIRegisterInfo *TRI = ST.getRegisterInfo();
   const SIInstrInfo *TII = ST.getInstrInfo();

diff --git a/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp b/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
index 24b7fe0f991d527d14d6035a5afbed4bab1f29ee..939062817a1e07808ddeb71e8873a13513cb758d 100644 (file)
--- a/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
@@ -830,7 +830,7 @@ void SIPeepholeSDWA::legalizeScalarOperands(MachineInstr &MI, const SISubtarget
 bool SIPeepholeSDWA::runOnMachineFunction(MachineFunction &MF) {
   const SISubtarget &ST = MF.getSubtarget<SISubtarget>();
 
-  if (!ST.hasSDWA())
+  if (!ST.hasSDWA() || skipFunction(*MF.getFunction()))
     return false;
 
   MRI = &MF.getRegInfo();

diff --git a/llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll b/llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
index 269f582bccfb16cb145ccd012dc09ce52f91b301..2122af62735fe4eeb9bbdbc4a69000c6e95d6ffa 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
+++ b/llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
@@ -12,7 +12,7 @@
 ; GCN-DAG: v_cmp_lt_i32
 ; GCN-DAG: v_cmp_gt_i32
 ; GCN: s_and_b64
-; GCN: s_and_saveexec_b64
+; GCN: s_mov_b64 exec
 
 ; GCN: s_or_b64 exec, exec
 ; GCN: v_cmp_eq_u32