fpga: Added Kconfig support for FPGA_SPARTAN3
authorVipul Kumar <vipul.kumar@xilinx.com>
Fri, 16 Feb 2018 12:32:49 +0000 (18:02 +0530)
committerTom Rini <trini@konsulko.com>
Wed, 28 Feb 2018 18:00:04 +0000 (13:00 -0500)
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
configs/apf27_defconfig
configs/astro_mcf5373l_defconfig
configs/mt_ventoux_defconfig
configs/x600_defconfig
drivers/fpga/Kconfig
include/configs/apf27.h
include/configs/astro_mcf5373l.h
include/configs/mt_ventoux.h
include/configs/x600.h

index f001912..d77d2b5 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_BOOTP_GATEWAY=y
 CONFIG_BOOTP_HOSTNAME=y
 CONFIG_BOOTP_SUBNETMASK=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
 CONFIG_MXC_GPIO=y
 CONFIG_MMC_MXC=y
 CONFIG_NAND=y
index 2302b1f..dc01724 100644 (file)
@@ -19,4 +19,5 @@ CONFIG_CMD_JFFS2=y
 CONFIG_FPGA_ALTERA=y
 CONFIG_FPGA_CYCLON2=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
 CONFIG_MTD_NOR_FLASH=y
index 2e58ec1..97bbd8e 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_BOOTP_DNS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
 CONFIG_SYS_OMAP24_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
index b63bf41..0aef5b6 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0xD2801FF8
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
index 6b2c866..4f9f0d1 100644 (file)
@@ -45,4 +45,9 @@ config FPGA_ZYNQMPPL
          Enable FPGA driver for loading bitstream in BIT and BIN format
          on Xilinx Zynq UltraScale+ (ZynqMP) device.
 
+config FPGA_SPARTAN3
+       bool "Enable Spartan3 FPGA driver"
+       help
+         Enable Spartan3 FPGA driver for loading in BIT format.
+
 endmenu
index 6b47f4a..1b52cc3 100644 (file)
  * FPGA
  */
 #define CONFIG_FPGA_COUNT              1
-#define CONFIG_FPGA_SPARTAN3
 #define CONFIG_SYS_FPGA_WAIT           250 /* 250 ms */
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #define CONFIG_SYS_FPGA_CHECK_CTRLC
index 8b883dd..4a62bce 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   0x20000
 
 #define CONFIG_FPGA_COUNT      1
-#define        CONFIG_FPGA_SPARTAN3
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #define CONFIG_SYS_FPGA_WAIT           1000
 
index e7f5e8d..7109949 100644 (file)
@@ -32,7 +32,6 @@
 /*
  * FPGA
  */
-#define CONFIG_FPGA_SPARTAN3
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #define CONFIG_SYS_FPGA_WAIT   10000
 #define CONFIG_MAX_FPGA_DEVICES        1
index 485522c..bfa6f5e 100644 (file)
@@ -85,7 +85,6 @@
 #define CONFIG_SYS_I2C_RTC_ADDR        0x68
 
 /* FPGA config options */
-#define CONFIG_FPGA_SPARTAN3
 #define CONFIG_FPGA_COUNT      1
 
 /* USB EHCI options */