arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
authorBiju Das <biju.das.jz@bp.renesas.com>
Fri, 1 Apr 2022 17:54:27 +0000 (18:54 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 13 Apr 2022 11:54:32 +0000 (13:54 +0200)
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi

index 8dd1c69..0e61b85 100644 (file)
@@ -74,7 +74,6 @@
                regulator-name = "SDHI1 VccQ";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <3300000>;
-               gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
                gpios-states = <1>;
                states = <3300000 1>, <1800000 0>;
        };
index c934cd3..aadc415 100644 (file)
@@ -48,3 +48,7 @@
        status = "okay";
 };
 #endif
+
+&vccq_sdhi1 {
+       gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+};
index 856c949..74a844e 100644 (file)
@@ -98,3 +98,7 @@
        status = "disabled";
 };
 #endif
+
+&vccq_sdhi1 {
+       gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+};