int ret;
if (fll->ref_src < 0 || fll->ref_src == source) {
- if (fll->sync_src == -1 &&
+ if (fll->sync_src == ARIZONA_FLL_SRC_NONE &&
fll->ref_src == source && fll->ref_freq == Fref &&
fll->fout == Fout)
return 0;
return ret;
}
- fll->sync_src = -1;
+ fll->sync_src = ARIZONA_FLL_SRC_NONE;
fll->ref_src = source;
fll->ref_freq = Fref;
} else {
fll->id = id;
fll->base = base;
fll->arizona = arizona;
- fll->sync_src = -1;
+ fll->sync_src = ARIZONA_FLL_SRC_NONE;
/* Configure default refclk to 32kHz if we have one */
regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
break;
default:
- fll->ref_src = -1;
+ fll->ref_src = ARIZONA_FLL_SRC_NONE;
}
fll->ref_freq = 32768;
#define ARIZONA_CLK_SRC_AIF2BCLK 0x9
#define ARIZONA_CLK_SRC_AIF3BCLK 0xa
+#define ARIZONA_FLL_SRC_NONE -1
#define ARIZONA_FLL_SRC_MCLK1 0
#define ARIZONA_FLL_SRC_MCLK2 1
#define ARIZONA_FLL_SRC_SLIMCLK 3