clk: mediatek: mt2712: use mtk_clk_simple_probe to simplify driver
authorMiles Chen <miles.chen@mediatek.com>
Thu, 22 Sep 2022 09:18:30 +0000 (17:18 +0800)
committerChen-Yu Tsai <wenst@chromium.org>
Mon, 26 Sep 2022 03:13:45 +0000 (11:13 +0800)
mtk_clk_simple_probe was added by Chun-Jie to simply common flow
of MediaTek clock drivers and ChenYu enhanced the error path of
mtk_clk_simple_probe and added mtk_clk_simple_remove.

Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other
MediaTek clock drivers as well.

Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220922091841.4099-3-miles.chen@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
drivers/clk/mediatek/clk-mt2712-bdp.c
drivers/clk/mediatek/clk-mt2712-img.c
drivers/clk/mediatek/clk-mt2712-jpgdec.c
drivers/clk/mediatek/clk-mt2712-mfg.c
drivers/clk/mediatek/clk-mt2712-vdec.c
drivers/clk/mediatek/clk-mt2712-venc.c

index 9acab43571337c9d39e3e22943a3d36ae042499d..684d03e9f6de17e4d70db7d3788152b489dc35bc 100644 (file)
@@ -58,33 +58,23 @@ static const struct mtk_gate bdp_clks[] = {
        GATE_BDP(CLK_BDP_TVD_CBUS, "bdp_tvd_cbus", "mm_sel", 30),
 };
 
-static int clk_mt2712_bdp_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_BDP_NR_CLK);
-
-       mtk_clk_register_gates(node, bdp_clks, ARRAY_SIZE(bdp_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc bdp_desc = {
+       .clks = bdp_clks,
+       .num_clks = ARRAY_SIZE(bdp_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_bdp[] = {
-       { .compatible = "mediatek,mt2712-bdpsys", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-bdpsys",
+               .data = &bdp_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_bdp_drv = {
-       .probe = clk_mt2712_bdp_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-bdp",
                .of_match_table = of_match_clk_mt2712_bdp,
index 5cc143e65e423dfab458fb02146e9f3e0ceb36cf..335049cdc856c6f2a97e29d7fe12b708c577264a 100644 (file)
@@ -36,33 +36,23 @@ static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11),
 };
 
-static int clk_mt2712_img_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
-
-       mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc img_desc = {
+       .clks = img_clks,
+       .num_clks = ARRAY_SIZE(img_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_img[] = {
-       { .compatible = "mediatek,mt2712-imgsys", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-imgsys",
+               .data = &img_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_img_drv = {
-       .probe = clk_mt2712_img_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-img",
                .of_match_table = of_match_clk_mt2712_img,
index 31fc30370d9831c1e6fd6744a3adeb6a9e1bf573..07ba7c5e80aff3a6b39887c416425559ca78a15a 100644 (file)
@@ -32,33 +32,23 @@ static const struct mtk_gate jpgdec_clks[] = {
        GATE_JPGDEC(CLK_JPGDEC_JPGDEC, "jpgdec_jpgdec", "jpgdec_sel", 4),
 };
 
-static int clk_mt2712_jpgdec_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_JPGDEC_NR_CLK);
-
-       mtk_clk_register_gates(node, jpgdec_clks, ARRAY_SIZE(jpgdec_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc jpgdec_desc = {
+       .clks = jpgdec_clks,
+       .num_clks = ARRAY_SIZE(jpgdec_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_jpgdec[] = {
-       { .compatible = "mediatek,mt2712-jpgdecsys", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-jpgdecsys",
+               .data = &jpgdec_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_jpgdec_drv = {
-       .probe = clk_mt2712_jpgdec_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-jpgdec",
                .of_match_table = of_match_clk_mt2712_jpgdec,
index a4d09675bf18e0d80d8dd067603421e414a5cdd6..42f8cf3ecf4cb2e529fadc68cb19eacd49d1beb9 100644 (file)
@@ -31,33 +31,23 @@ static const struct mtk_gate mfg_clks[] = {
        GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0),
 };
 
-static int clk_mt2712_mfg_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK);
-
-       mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc mfg_desc = {
+       .clks = mfg_clks,
+       .num_clks = ARRAY_SIZE(mfg_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_mfg[] = {
-       { .compatible = "mediatek,mt2712-mfgcfg", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-mfgcfg",
+               .data = &mfg_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_mfg_drv = {
-       .probe = clk_mt2712_mfg_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-mfg",
                .of_match_table = of_match_clk_mt2712_mfg,
index af13f43dd83198b6c54878db5894f88d678c4030..6296ed5c5b5559cdb48d552242626739df044c8b 100644 (file)
@@ -50,33 +50,23 @@ static const struct mtk_gate vdec_clks[] = {
        GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
 };
 
-static int clk_mt2712_vdec_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
-
-       mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc vdec_desc = {
+       .clks = vdec_clks,
+       .num_clks = ARRAY_SIZE(vdec_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_vdec[] = {
-       { .compatible = "mediatek,mt2712-vdecsys", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-vdecsys",
+               .data = &vdec_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_vdec_drv = {
-       .probe = clk_mt2712_vdec_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-vdec",
                .of_match_table = of_match_clk_mt2712_vdec,
index abc08a02975353c83640cf35bf3b3c5deed3a281..b9bfc35de629c6a5a64873a8884ec35d6a3bb890 100644 (file)
@@ -33,33 +33,23 @@ static const struct mtk_gate venc_clks[] = {
        GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12),
 };
 
-static int clk_mt2712_venc_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
-
-       mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
-                       clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-
-       if (r != 0)
-               pr_err("%s(): could not register clock provider: %d\n",
-                       __func__, r);
-
-       return r;
-}
+static const struct mtk_clk_desc venc_desc = {
+       .clks = venc_clks,
+       .num_clks = ARRAY_SIZE(venc_clks),
+};
 
 static const struct of_device_id of_match_clk_mt2712_venc[] = {
-       { .compatible = "mediatek,mt2712-vencsys", },
-       {}
+       {
+               .compatible = "mediatek,mt2712-vencsys",
+               .data = &venc_desc,
+       }, {
+               /* sentinel */
+       }
 };
 
 static struct platform_driver clk_mt2712_venc_drv = {
-       .probe = clk_mt2712_venc_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt2712-venc",
                .of_match_table = of_match_clk_mt2712_venc,