drm/amd/display: Apply all surface updates onto surfaces

[Why]
Most surface updates weren't propagated onto the surface during
dc_commit_updates_for_stream. This makes it more difficult for DC to
determine the actual surface update type required.

[How]
Use copy_surface_update_to_plane to propagate the changes. The FreeSync
surface timing information update for BTR has been moved out of
amdgpu_dm.c into this function as well.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0eea6c8..f0baf35 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4760,15 +4760,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                                        surface,
                                        flip->flip_addrs[flip_count].flip_timestamp_in_us);
 
-                       /* Update surface timing information. */
-                       surface->time.time_elapsed_in_us[surface->time.index] =
-                               flip->flip_addrs[flip_count].flip_timestamp_in_us -
-                               surface->time.prev_update_time_in_us;
-                       surface->time.prev_update_time_in_us = flip->flip_addrs[flip_count].flip_timestamp_in_us;
-                       surface->time.index++;
-                       if (surface->time.index >= DC_PLANE_UPDATE_TIMES_MAX)
-                               surface->time.index = 0;
-
                        DRM_DEBUG_DRIVER("%s Flipping to hi: 0x%x, low: 0x%x\n",
                                         __func__,
                                         flip->flip_addrs[flip_count].address.grph.addr.high_part,

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index e22be0a..db8252e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1440,6 +1440,101 @@ static struct dc_stream_status *stream_get_status(
 
 static const enum surface_update_type update_surface_trace_level = UPDATE_TYPE_FULL;
 
+static void copy_surface_update_to_plane(
+               struct dc_plane_state *surface,
+               struct dc_surface_update *srf_update)
+{
+       if (srf_update->flip_addr) {
+               surface->address = srf_update->flip_addr->address;
+               surface->flip_immediate =
+                       srf_update->flip_addr->flip_immediate;
+               surface->time.time_elapsed_in_us[surface->time.index] =
+                       srf_update->flip_addr->flip_timestamp_in_us -
+                               surface->time.prev_update_time_in_us;
+               surface->time.prev_update_time_in_us =
+                       srf_update->flip_addr->flip_timestamp_in_us;
+               surface->time.index++;
+               if (surface->time.index >= DC_PLANE_UPDATE_TIMES_MAX)
+                       surface->time.index = 0;
+       }
+
+       if (srf_update->scaling_info) {
+               surface->scaling_quality =
+                               srf_update->scaling_info->scaling_quality;
+               surface->dst_rect =
+                               srf_update->scaling_info->dst_rect;
+               surface->src_rect =
+                               srf_update->scaling_info->src_rect;
+               surface->clip_rect =
+                               srf_update->scaling_info->clip_rect;
+       }
+
+       if (srf_update->plane_info) {
+               surface->color_space =
+                               srf_update->plane_info->color_space;
+               surface->format =
+                               srf_update->plane_info->format;
+               surface->plane_size =
+                               srf_update->plane_info->plane_size;
+               surface->rotation =
+                               srf_update->plane_info->rotation;
+               surface->horizontal_mirror =
+                               srf_update->plane_info->horizontal_mirror;
+               surface->stereo_format =
+                               srf_update->plane_info->stereo_format;
+               surface->tiling_info =
+                               srf_update->plane_info->tiling_info;
+               surface->visible =
+                               srf_update->plane_info->visible;
+               surface->per_pixel_alpha =
+                               srf_update->plane_info->per_pixel_alpha;
+               surface->global_alpha =
+                               srf_update->plane_info->global_alpha;
+               surface->global_alpha_value =
+                               srf_update->plane_info->global_alpha_value;
+               surface->dcc =
+                               srf_update->plane_info->dcc;
+               surface->sdr_white_level =
+                               srf_update->plane_info->sdr_white_level;
+       }
+
+       if (srf_update->gamma &&
+                       (surface->gamma_correction !=
+                                       srf_update->gamma)) {
+               memcpy(&surface->gamma_correction->entries,
+                       &srf_update->gamma->entries,
+                       sizeof(struct dc_gamma_entries));
+               surface->gamma_correction->is_identity =
+                       srf_update->gamma->is_identity;
+               surface->gamma_correction->num_entries =
+                       srf_update->gamma->num_entries;
+               surface->gamma_correction->type =
+                       srf_update->gamma->type;
+       }
+
+       if (srf_update->in_transfer_func &&
+                       (surface->in_transfer_func !=
+                               srf_update->in_transfer_func)) {
+               surface->in_transfer_func->sdr_ref_white_level =
+                       srf_update->in_transfer_func->sdr_ref_white_level;
+               surface->in_transfer_func->tf =
+                       srf_update->in_transfer_func->tf;
+               surface->in_transfer_func->type =
+                       srf_update->in_transfer_func->type;
+               memcpy(&surface->in_transfer_func->tf_pts,
+                       &srf_update->in_transfer_func->tf_pts,
+                       sizeof(struct dc_transfer_func_distributed_points));
+       }
+
+       if (srf_update->input_csc_color_matrix)
+               surface->input_csc_color_matrix =
+                       *srf_update->input_csc_color_matrix;
+
+       if (srf_update->coeff_reduction_factor)
+               surface->coeff_reduction_factor =
+                       *srf_update->coeff_reduction_factor;
+}
+
 static void commit_planes_do_stream_update(struct dc *dc,
                struct dc_stream_state *stream,
                struct dc_stream_update *stream_update,
@@ -1645,14 +1740,7 @@ void dc_commit_updates_for_stream(struct dc *dc,
        for (i = 0; i < surface_count; i++) {
                struct dc_plane_state *surface = srf_updates[i].surface;
 
-               /* TODO: On flip we don't build the state, so it still has the
-                * old address. Which is why we are updating the address here
-                */
-               if (srf_updates[i].flip_addr) {
-                       surface->address = srf_updates[i].flip_addr->address;
-                       surface->flip_immediate = srf_updates[i].flip_addr->flip_immediate;
-
-               }
+               copy_surface_update_to_plane(surface, &srf_updates[i]);
 
                if (update_type >= UPDATE_TYPE_MED) {
                        for (j = 0; j < dc->res_pool->pipe_count; j++) {