agx: Add extr instruction to AGX backend

Encoding is similar to bfeil, in particular the immidiate has the
same encoding as BFI_MASK hence its reuse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20628>

diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c
index fb93330..399de7c 100644 (file)
--- a/src/asahi/compiler/agx_compile.c
+++ b/src/asahi/compiler/agx_compile.c
@@ -908,6 +908,9 @@ agx_emit_alu(agx_builder *b, nir_alu_instr *instr)
    case nir_op_ishr:
       return agx_asr_to(b, dst, s0, s1);
 
+   case nir_op_extr_agx:
+      return agx_extr_to(b, dst, s0, s1, s2, nir_src_as_uint(instr->src[3].src));
+
    case nir_op_bcsel:
       return agx_icmpsel_to(b, dst, s0, i0, s2, s1, AGX_ICOND_UEQ);
 

diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py
index 01898f3..f86602e 100644 (file)
--- a/src/asahi/compiler/agx_opcodes.py
+++ b/src/asahi/compiler/agx_opcodes.py
@@ -213,6 +213,10 @@ op("bfeil",
       encoding_32 = (0x2E | L, 0x7F | L | (0x3 << 26), 8, _),
       srcs = 3, imms = [BFI_MASK])
 
+op("extr",
+      encoding_32 = (0x2E | (0x1 << 26), 0x7F | L | (0x3 << 26), 8, _),
+      srcs = 3, imms = [BFI_MASK])
+
 op("asr",
       encoding_32 = (0x2E | L | (0x1 << 26), 0x7F | L | (0x3 << 26), 8, _),
       srcs = 2)