drm/nouveau: silence sparse warnings about symbols not being marked static
authorBen Skeggs <bskeggs@redhat.com>
Fri, 4 Nov 2016 01:44:21 +0000 (11:44 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 7 Nov 2016 04:04:40 +0000 (14:04 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
33 files changed:
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
drivers/gpu/drm/nouveau/nouveau_connector.h
drivers/gpu/drm/nouveau/nouveau_drm.c
drivers/gpu/drm/nouveau/nvif/client.c
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/coreg94.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp104.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf117.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk104.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk110.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgm107.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/g98.fuc0s.h
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h
drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.c

index cf68106..65ce79a 100644 (file)
@@ -157,4 +157,6 @@ struct nvkm_ram_func {
        int (*prog)(struct nvkm_ram *);
        void (*tidy)(struct nvkm_ram *);
 };
+
+extern const u8 gf100_pte_storage_type_map[256];
 #endif
index 7446ee6..43b9583 100644 (file)
@@ -109,5 +109,6 @@ nouveau_connector_create(struct drm_device *, int index);
 extern int nouveau_tv_disable;
 extern int nouveau_ignorelid;
 extern int nouveau_duallink;
+extern int nouveau_hdmimhz;
 
 #endif /* __NOUVEAU_CONNECTOR_H__ */
index 6adf947..6228815 100644 (file)
@@ -1037,6 +1037,7 @@ static void nouveau_display_options(void)
        DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
        DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
        DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
+       DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
 }
 
 static const struct dev_pm_ops nouveau_pm_ops = {
index 1ee9294..29c20df 100644 (file)
@@ -55,7 +55,7 @@ nvif_client_fini(struct nvif_client *client)
        }
 }
 
-const struct nvif_driver *
+static const struct nvif_driver *
 nvif_drivers[] = {
 #ifdef __KERNEL__
        &nvif_driver_nvkm,
index 05bb656..d9ca963 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_ce_data[] = {
+static uint32_t gf100_ce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_query_address_high */
@@ -171,7 +171,7 @@ uint32_t gf100_ce_data[] = {
        0x00000800,
 };
 
-uint32_t gf100_ce_code[] = {
+static uint32_t gf100_ce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,
index 972281d..f0a1cf3 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gt215_ce_data[] = {
+static uint32_t gt215_ce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_dma */
@@ -183,7 +183,7 @@ uint32_t gt215_ce_data[] = {
        0x00000800,
 };
 
-uint32_t gt215_ce_code[] = {
+static uint32_t gt215_ce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,
index 019379a..c65c9f3 100644 (file)
@@ -26,7 +26,7 @@
 
 #include <nvif/class.h>
 
-const struct nv50_disp_mthd_list
+static const struct nv50_disp_mthd_list
 g94_disp_core_mthd_sor = {
        .mthd = 0x0040,
        .addr = 0x000008,
@@ -43,8 +43,8 @@ g94_disp_core_chan_mthd = {
        .prev = 0x000004,
        .data = {
                { "Global", 1, &nv50_disp_core_mthd_base },
-               {    "DAC", 3, &g84_disp_core_mthd_dac  },
-               {    "SOR", 4, &g94_disp_core_mthd_sor  },
+               {    "DAC", 3, &g84_disp_core_mthd_dac },
+               {    "SOR", 4, &g94_disp_core_mthd_sor },
                {   "PIOR", 3, &nv50_disp_core_mthd_pior },
                {   "HEAD", 2, &g84_disp_core_mthd_head },
                {}
index 6922f40..e356f87 100644 (file)
@@ -59,7 +59,7 @@ gp104_disp_core_init(struct nv50_disp_dmac *chan)
        return 0;
 }
 
-const struct nv50_disp_dmac_func
+static const struct nv50_disp_dmac_func
 gp104_disp_core_func = {
        .init = gp104_disp_core_init,
        .fini = gf119_disp_core_fini,
index 8cb240b..12a703f 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_grgpc_data[] = {
+static uint32_t gf100_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x00000064,
 /* 0x0004: gpc_mmio_list_tail */
@@ -36,7 +36,7 @@ uint32_t gf100_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gf100_grgpc_code[] = {
+static uint32_t gf100_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 550d6ba..ffbfc51 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf117_grgpc_data[] = {
+static uint32_t gf117_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gf117_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gf117_grgpc_code[] = {
+static uint32_t gf117_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 271b59d..357f662 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk104_grgpc_data[] = {
+static uint32_t gk104_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk104_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk104_grgpc_code[] = {
+static uint32_t gk104_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 73b4a32..4ffc821 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk110_grgpc_data[] = {
+static uint32_t gk110_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk110_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk110_grgpc_code[] = {
+static uint32_t gk110_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 0181698..0919620 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_grgpc_data[] = {
+static uint32_t gk208_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk208_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk208_grgpc_code[] = {
+static uint32_t gk208_grgpc_code[] = {
        0x03140ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index eca007f..6d7d004 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gm107_grgpc_data[] = {
+static uint32_t gm107_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gm107_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gm107_grgpc_code[] = {
+static uint32_t gm107_grgpc_code[] = {
        0x03410ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 8015b40..7538404 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_grhub_data[] = {
+static uint32_t gf100_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gf100_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gf100_grhub_code[] = {
+static uint32_t gf100_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 2af90ec..ce000a4 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf117_grhub_data[] = {
+static uint32_t gf117_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gf117_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gf117_grhub_code[] = {
+static uint32_t gf117_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index e8b8c1c..1f26cb6 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk104_grhub_data[] = {
+static uint32_t gk104_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk104_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk104_grhub_code[] = {
+static uint32_t gk104_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index f4ed2fb..70436d9 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk110_grhub_data[] = {
+static uint32_t gk110_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk110_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk110_grhub_code[] = {
+static uint32_t gk110_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index ed48897..e0933a0 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_grhub_data[] = {
+static uint32_t gk208_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk208_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk208_grhub_code[] = {
+static uint32_t gk208_grhub_code[] = {
        0x030e0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 5c90518..9b43282 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gm107_grhub_data[] = {
+static uint32_t gm107_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gm107_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gm107_grhub_code[] = {
+static uint32_t gm107_grhub_code[] = {
        0x030e0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 70335f6..0124e46 100644 (file)
@@ -102,7 +102,7 @@ gf117_gr_pack_mmio[] = {
 
 #include "fuc/hubgf117.fuc3.h"
 
-struct gf100_gr_ucode
+static struct gf100_gr_ucode
 gf117_gr_fecs_ucode = {
        .code.data = gf117_grhub_code,
        .code.size = sizeof(gf117_grhub_code),
@@ -112,7 +112,7 @@ gf117_gr_fecs_ucode = {
 
 #include "fuc/gpcgf117.fuc3.h"
 
-struct gf100_gr_ucode
+static struct gf100_gr_ucode
 gf117_gr_gpccs_ucode = {
        .code.data = gf117_grgpc_code,
        .code.size = sizeof(gf117_grgpc_code),
index d2901e9..fe2532e 100644 (file)
@@ -102,7 +102,7 @@ gf100_pm_gpc[] = {
        {}
 };
 
-const struct nvkm_specdom
+static const struct nvkm_specdom
 gf100_pm_part[] = {
        { 0xe0, (const struct nvkm_specsig[]) {
                        { 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
index eca6222..4b57f88 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t g98_sec_data[] = {
+static uint32_t g98_sec_data[] = {
 /* 0x0000: ctx_dma */
 /* 0x0000: ctx_dma_query */
        0x00000000,
@@ -150,7 +150,7 @@ uint32_t g98_sec_data[] = {
        0x00000000,
 };
 
-uint32_t g98_sec_code[] = {
+static uint32_t g98_sec_code[] = {
        0x17f004bd,
        0x0010fe35,
        0xf10004fe,
index 772425c..093223d 100644 (file)
@@ -420,8 +420,6 @@ gf100_ram_tidy(struct nvkm_ram *base)
        ram_exec(&ram->fuc, false);
 }
 
-extern const u8 gf100_pte_storage_type_map[256];
-
 void
 gf100_ram_put(struct nvkm_ram *ram, struct nvkm_mem **pmem)
 {
index f0851d5..01d5c5a 100644 (file)
@@ -74,7 +74,7 @@ nvkm_i2c_aux_i2c_func(struct i2c_adapter *adap)
        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
-const struct i2c_algorithm
+static const struct i2c_algorithm
 nvkm_i2c_aux_i2c_algo = {
        .master_xfer = nvkm_i2c_aux_i2c_xfer,
        .functionality = nvkm_i2c_aux_i2c_func
index 658355f..f0af2a3 100644 (file)
@@ -288,7 +288,8 @@ nvkm_iccsense_init(struct nvkm_subdev *subdev)
        return 0;
 }
 
-struct nvkm_subdev_func iccsense_func = {
+static const struct nvkm_subdev_func
+iccsense_func = {
        .oneinit = nvkm_iccsense_oneinit,
        .init = nvkm_iccsense_init,
        .dtor = nvkm_iccsense_dtor,
index 8ed8f65..10c987a 100644 (file)
@@ -104,7 +104,7 @@ nvkm_instobj_dtor(struct nvkm_memory *memory)
        return iobj;
 }
 
-const struct nvkm_memory_func
+static const struct nvkm_memory_func
 nvkm_instobj_func = {
        .dtor = nvkm_instobj_dtor,
        .target = nvkm_instobj_target,
@@ -156,7 +156,7 @@ nvkm_instobj_wr32_slow(struct nvkm_memory *memory, u64 offset, u32 data)
        return nvkm_wo32(iobj->parent, offset, data);
 }
 
-const struct nvkm_memory_func
+static const struct nvkm_memory_func
 nvkm_instobj_func_slow = {
        .dtor = nvkm_instobj_dtor,
        .target = nvkm_instobj_target,
index c3d66ef..430a61c 100644 (file)
@@ -34,7 +34,7 @@ g84_mc_reset[] = {
        {}
 };
 
-const struct nvkm_mc_map
+static const struct nvkm_mc_map
 g84_mc_intr[] = {
        { 0x04000000, NVKM_ENGINE_DISP },
        { 0x00020000, NVKM_ENGINE_VP },
index e2faccf..0bcf0b3 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_pmu_data[] = {
+static uint32_t gf100_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -916,7 +916,7 @@ uint32_t gf100_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gf100_pmu_code[] = {
+static uint32_t gf100_pmu_code[] = {
        0x03920ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 2d5bdc5..fe89056 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf119_pmu_data[] = {
+static uint32_t gf119_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -915,7 +915,7 @@ uint32_t gf119_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gf119_pmu_code[] = {
+static uint32_t gf119_pmu_code[] = {
        0x03410ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 3c731ff..9cf4e6f 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_pmu_data[] = {
+static uint32_t gk208_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -915,7 +915,7 @@ uint32_t gk208_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gk208_pmu_code[] = {
+static uint32_t gk208_pmu_code[] = {
        0x02f90ef5,
 /* 0x0004: rd32 */
        0xf607a040,
index e833418..5d69242 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gt215_pmu_data[] = {
+static uint32_t gt215_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -916,7 +916,7 @@ uint32_t gt215_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gt215_pmu_code[] = {
+static uint32_t gt215_pmu_code[] = {
        0x03920ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 74db4d2..2925b9c 100644 (file)
@@ -25,7 +25,7 @@
 
 #include <core/tegra.h>
 
-const struct cvb_coef gm20b_cvb_coef[] = {
+static const struct cvb_coef gm20b_cvb_coef[] = {
        /* KHz,             c0,      c1,   c2 */
        /*  76800 */ { 1786666,  -85625, 1632 },
        /* 153600 */ { 1846729,  -87525, 1632 },
@@ -58,7 +58,7 @@ static const struct cvb_coef gm20b_na_cvb_coef[] = {
        /* 998400 */ { 1316991, 8144, -940, 808, -21583, 226 },
 };
 
-const u32 speedo_to_vmin[] = {
+static const u32 speedo_to_vmin[] = {
        /*   0,      1,      2,      3,      4, */
        950000, 840000, 818750, 840000, 810000,
 };