arm64: dts: qcom: msm8996: Add interconnect support

Add interconnect providers for the multiple NoCs available on the platform,
and assign interconnects used by some blocks.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211021132329.234942-6-y.oudjana@protonmail.com

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 25d6b26..b9a37e7 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/interconnect/qcom,msm8996.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/thermal/thermal.h>
@@ -691,6 +692,15 @@
                        clock-names = "cxo", "cxo2", "sleep_clk";
                };
 
+               bimc: interconnect@408000 {
+                       compatible = "qcom,msm8996-bimc";
+                       reg = <0x00408000 0x5a000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+                                <&rpmcc RPM_SMD_BIMC_A_CLK>;
+               };
+
                tsens0: thermal-sensor@4a9000 {
                        compatible = "qcom,msm8996-tsens", "qcom,tsens-v2";
                        reg = <0x004a9000 0x1000>, /* TM */
@@ -735,6 +745,74 @@
                        dma-names = "rx", "tx";
                };
 
+               cnoc: interconnect@500000 {
+                       compatible = "qcom,msm8996-cnoc";
+                       reg = <0x00500000 0x1000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
+                                <&rpmcc RPM_SMD_CNOC_A_CLK>;
+               };
+
+               snoc: interconnect@524000 {
+                       compatible = "qcom,msm8996-snoc";
+                       reg = <0x00524000 0x1c000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+                                <&rpmcc RPM_SMD_SNOC_A_CLK>;
+               };
+
+               a0noc: interconnect@543000 {
+                       compatible = "qcom,msm8996-a0noc";
+                       reg = <0x00543000 0x6000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "aggre0_snoc_axi",
+                                     "aggre0_cnoc_ahb",
+                                     "aggre0_noc_mpu_cfg";
+                       clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>,
+                                <&gcc GCC_AGGRE0_CNOC_AHB_CLK>,
+                                <&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>;
+                       power-domains = <&gcc AGGRE0_NOC_GDSC>;
+               };
+
+               a1noc: interconnect@562000 {
+                       compatible = "qcom,msm8996-a1noc";
+                       reg = <0x00562000 0x5000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>,
+                                <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>;
+               };
+
+               a2noc: interconnect@583000 {
+                       compatible = "qcom,msm8996-a2noc";
+                       reg = <0x00583000 0x7000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
+                                <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
+               };
+
+               mnoc: interconnect@5a4000 {
+                       compatible = "qcom,msm8996-mnoc";
+                       reg = <0x005a4000 0x1c000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a", "iface";
+                       clocks = <&rpmcc RPM_SMD_MMAXI_CLK>,
+                                <&rpmcc RPM_SMD_MMAXI_A_CLK>,
+                                <&mmcc AHB_CLK_SRC>;
+               };
+
+               pnoc: interconnect@5c0000 {
+                       compatible = "qcom,msm8996-pnoc";
+                       reg = <0x005c0000 0x3000>;
+                       #interconnect-cells = <1>;
+                       clock-names = "bus", "bus_a";
+                       clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
+                                <&rpmcc RPM_SMD_PCNOC_A_CLK>;
+               };
+
                tcsr_mutex_regs: syscon@740000 {
                        compatible = "syscon";
                        reg = <0x00740000 0x40000>;
@@ -831,6 +909,11 @@
                                assigned-clock-rates = <300000000>,
                                         <19200000>;
 
+                               interconnects = <&mnoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>,
+                                               <&mnoc MASTER_MDP_PORT1 &bimc SLAVE_EBI_CH0>,
+                                               <&mnoc MASTER_ROTATOR &bimc SLAVE_EBI_CH0>;
+                               interconnect-names = "mdp0-mem", "mdp1-mem", "rotator-mem";
+
                                ports {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
@@ -1077,6 +1160,9 @@
                                "mem",
                                "mem_iface";
 
+                       interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>;
+                       interconnect-names = "gfx-mem";
+
                        power-domains = <&mmcc GPU_GX_GDSC>;
                        iommus = <&adreno_smmu 0>;
 
@@ -2102,6 +2188,9 @@
                                 <&mmcc VIDEO_AXI_CLK>,
                                 <&mmcc VIDEO_MAXI_CLK>;
                        clock-names = "core", "iface", "bus", "mbus";
+                       interconnects = <&mnoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>,
+                                       <&bimc MASTER_AMPSS_M0 &mnoc SLAVE_VENUS_CFG>;
+                       interconnect-names = "video-mem", "cpu-cfg";
                        iommus = <&venus_smmu 0x00>,
                                 <&venus_smmu 0x01>,
                                 <&venus_smmu 0x0a>,
@@ -2821,6 +2910,10 @@
                                          <&gcc GCC_USB30_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <120000000>;
 
+                       interconnects = <&a2noc MASTER_USB3 &bimc SLAVE_EBI_CH0>,
+                                       <&bimc MASTER_AMPSS_M0 &snoc SLAVE_USB3>;
+                       interconnect-names = "usb-ddr", "apps-usb";
+
                        power-domains = <&gcc USB30_GDSC>;
                        status = "disabled";