dt-bindings: Rename file of DT bindings for Renesas memory controllers
authorSimon Horman <horms+renesas@verge.net.au>
Wed, 3 Jul 2019 08:41:06 +0000 (10:41 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 8 Aug 2019 08:39:48 +0000 (10:39 +0200)
For consistency with the naming of (most) other documentation files for DT
bindings for Renesas IP blocks rename the Renesas R-Mobile and SH-Mobile
memory controllers documentation file from renesas-memory-controllers.txt
to renesas,dbsc.txt.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.txt [new file with mode: 0644]
Documentation/devicetree/bindings/memory-controllers/renesas-memory-controllers.txt [deleted file]

diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.txt b/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.txt
new file mode 100644 (file)
index 0000000..9f78e6c
--- /dev/null
@@ -0,0 +1,44 @@
+DT bindings for Renesas R-Mobile and SH-Mobile memory controllers
+=================================================================
+
+Renesas R-Mobile and SH-Mobile SoCs contain one or more memory controllers.
+These memory controllers differ from one SoC variant to another, and are called
+by different names ("DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
+(DBSC3)", "SDRAM Bus State Controller (SBSC)").
+
+Currently memory controller device nodes are used only to reference PM
+domains, and prevent these PM domains from being powered down, which would
+crash the system.
+
+As there exist no actual drivers for these controllers yet, these bindings
+should be considered EXPERIMENTAL for now.
+
+Required properties:
+  - compatible: Must be one of the following SoC-specific values:
+                 - "renesas,dbsc-r8a73a4" (R-Mobile APE6)
+                 - "renesas,dbsc3-r8a7740" (R-Mobile A1)
+                 - "renesas,sbsc-sh73a0" (SH-Mobile AG5)
+  - reg: Must contain the base address and length of the memory controller's
+        registers.
+
+Optional properties:
+  - interrupts: Must contain a list of interrupt specifiers for memory
+               controller interrupts, if available.
+  - interrupt-names: Must contain a list of interrupt names corresponding to
+                    the interrupts in the interrupts property, if available.
+                    Valid interrupt names are:
+                       - "sec" (secure interrupt)
+                       - "temp" (normal (temperature) interrupt)
+  - power-domains: Must contain a reference to the PM domain that the memory
+                  controller belongs to, if available.
+
+Example:
+
+       sbsc1: memory-controller@fe400000 {
+               compatible = "renesas,sbsc-sh73a0";
+               reg = <0xfe400000 0x400>;
+               interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 36 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "sec", "temp";
+               power-domains = <&pd_a4bc0>;
+       };
diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas-memory-controllers.txt b/Documentation/devicetree/bindings/memory-controllers/renesas-memory-controllers.txt
deleted file mode 100644 (file)
index 9f78e6c..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-DT bindings for Renesas R-Mobile and SH-Mobile memory controllers
-=================================================================
-
-Renesas R-Mobile and SH-Mobile SoCs contain one or more memory controllers.
-These memory controllers differ from one SoC variant to another, and are called
-by different names ("DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
-(DBSC3)", "SDRAM Bus State Controller (SBSC)").
-
-Currently memory controller device nodes are used only to reference PM
-domains, and prevent these PM domains from being powered down, which would
-crash the system.
-
-As there exist no actual drivers for these controllers yet, these bindings
-should be considered EXPERIMENTAL for now.
-
-Required properties:
-  - compatible: Must be one of the following SoC-specific values:
-                 - "renesas,dbsc-r8a73a4" (R-Mobile APE6)
-                 - "renesas,dbsc3-r8a7740" (R-Mobile A1)
-                 - "renesas,sbsc-sh73a0" (SH-Mobile AG5)
-  - reg: Must contain the base address and length of the memory controller's
-        registers.
-
-Optional properties:
-  - interrupts: Must contain a list of interrupt specifiers for memory
-               controller interrupts, if available.
-  - interrupt-names: Must contain a list of interrupt names corresponding to
-                    the interrupts in the interrupts property, if available.
-                    Valid interrupt names are:
-                       - "sec" (secure interrupt)
-                       - "temp" (normal (temperature) interrupt)
-  - power-domains: Must contain a reference to the PM domain that the memory
-                  controller belongs to, if available.
-
-Example:
-
-       sbsc1: memory-controller@fe400000 {
-               compatible = "renesas,sbsc-sh73a0";
-               reg = <0xfe400000 0x400>;
-               interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 36 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "sec", "temp";
-               power-domains = <&pd_a4bc0>;
-       };