clk: renesas: r8a7740: Always use readl()/writel()
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 15 Mar 2018 09:43:57 +0000 (10:43 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Mar 2018 16:34:53 +0000 (17:34 +0100)
On arm32, there is no reason to use the (soon deprecated)
clk_readl()/clk_writel().  Hence use the generic readl()/writel()
instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/clk/renesas/clk-r8a7740.c

index 2f7ce66..d074f8e 100644 (file)
@@ -98,20 +98,20 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
                 * clock implementation and we currently have no need to change
                 * the multiplier value.
                 */
-               u32 value = clk_readl(cpg->reg + CPG_FRQCRC);
+               u32 value = readl(cpg->reg + CPG_FRQCRC);
                parent_name = "system";
                mult = ((value >> 24) & 0x7f) + 1;
        } else if (!strcmp(name, "pllc1")) {
-               u32 value = clk_readl(cpg->reg + CPG_FRQCRA);
+               u32 value = readl(cpg->reg + CPG_FRQCRA);
                parent_name = "system";
                mult = ((value >> 24) & 0x7f) + 1;
                div = 2;
        } else if (!strcmp(name, "pllc2")) {
-               u32 value = clk_readl(cpg->reg + CPG_PLLC2CR);
+               u32 value = readl(cpg->reg + CPG_PLLC2CR);
                parent_name = "system";
                mult = ((value >> 24) & 0x3f) + 1;
        } else if (!strcmp(name, "usb24s")) {
-               u32 value = clk_readl(cpg->reg + CPG_USBCKCR);
+               u32 value = readl(cpg->reg + CPG_USBCKCR);
                if (value & BIT(7))
                        /* extal2 */
                        parent_name = of_clk_get_parent_name(np, 1);