struct atom_vram_info_header_v2_3 v23;
struct atom_vram_info_header_v2_4 v24;
struct atom_vram_info_header_v2_5 v25;
+ struct atom_vram_info_header_v2_5 v26;
};
union vram_module {
if (vram_vendor)
*vram_vendor = mem_vendor;
break;
+ case 6:
+ if (module_id > vram_info->v26.vram_module_num)
+ module_id = 0;
+ vram_module = (union vram_module *)vram_info->v26.vram_module;
+ while (i < module_id) {
+ vram_module = (union vram_module *)
+ ((u8 *)vram_module + vram_module->v11.vram_module_size);
+ i++;
+ }
+ mem_type = vram_module->v9.memory_type;
+ if (vram_type)
+ *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
+ mem_channel_number = vram_module->v9.channel_num;
+ mem_channel_width = vram_module->v9.channel_width;
+ if (vram_width)
+ *vram_width = mem_channel_number * (1 << mem_channel_width);
+ mem_vendor = (vram_module->v9.vender_rev_id) & 0xF;
+ if (vram_vendor)
+ *vram_vendor = mem_vendor;
+ break;
default:
return -EINVAL;
}
struct atom_vram_module_v11 vram_module[16]; // just for allocation, real number of blocks is in ucNumOfVRAMModule;
};
+struct atom_vram_info_header_v2_6 {
+ struct atom_common_table_header table_header;
+ uint16_t mem_adjust_tbloffset;
+ uint16_t mem_clk_patch_tbloffset;
+ uint16_t mc_adjust_pertile_tbloffset;
+ uint16_t mc_phyinit_tbloffset;
+ uint16_t dram_data_remap_tbloffset;
+ uint16_t tmrs_seq_offset;
+ uint16_t post_ucode_init_offset;
+ uint16_t vram_rsd2;
+ uint8_t vram_module_num;
+ uint8_t umcip_min_ver;
+ uint8_t umcip_max_ver;
+ uint8_t mc_phy_tile_num;
+ struct atom_vram_module_v9 vram_module[16];
+};
/*
***************************************************************************
Data Table voltageobject_info structure