+2012-07-27 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/601.md: New file.
+ * config/rs6000/aix43.h (ASM_CPU_SPEC): Delete support for
+ RIOS CPUs.
+ * config/rs6000/aix51.h (ASM_CPU_SPEC): Likewise.
+ * config/rs6000/driver-rs6000.c (detect_processor_aix,
+ struct asm_names): Likewise.
+ * config/rs6000/rios1.md: Delete file.
+ * config/rs6000/rios2.md: Delete file.
+ * config/rs6000/rs6000-cpus.def: Delete definitions for RIOS
+ CPUs.
+ * config/rs6000/rs6000-opts.h (enum processor_type): Delete
+ PROCESSOR_RIOS1 and PROCESSOR_RIOS2.
+ * config/rs6000/rs6000-tables.opt: Regenerated.
+ * config/rs6000/rs6000.c (struct rios1_cost, struct rios2_cost):
+ Delete.
+ (rs6000_option_override_internal): Delete support for RIOS CPUs.
+ (rs6000_conditional_register_usage): Adjust comment.
+ (rs6000_issue_rate):Delete support for RIOS CPUs.
+ * config/rs6000/rs6000.h (ASM_CPU_SPEC): Delete support for
+ RIOS CPUs.
+ (PROCESSOR_POWER): Change to PROCESSOR_PPC601.
+ (PROCESSOR_DEFAULT): Change to PROCESSOR_PPC603.
+ * config/rs6000/rs6000.md (define_attr "cpu"): Delete rios1
+ and rios2.
+ (include "rios1.md", include "rios2.md"): Delete.
+ (include "601.md"): New.
+ * config/rs6000/rs6000.opt (enum rs6000_cpu): Default to
+ PROCESSOR_PPC603.
+ * config/rs6000/t-aix43 (MULTILIB_MATCHES): Delete support
+ for RIOS CPUs.
+ * config/rs6000/t-rs6000 (MD_INCLUDES): Delete rios1.md and
+ rios2.md . Add 601.md .
+
2012-07-26 Richard Henderson <rth@redhat.com>
* doc/extend.texi (attribute): Document hot/cold for labels.
--- /dev/null
+;; Scheduling description for PowerPC 601 processor.
+;; Copyright (C) 2003-2012 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
+
+(define_automaton "ppc601,ppc601fp")
+(define_cpu_unit "iu_ppc601" "ppc601")
+(define_cpu_unit "fpu_ppc601" "ppc601fp")
+(define_cpu_unit "bpu_ppc601" "ppc601")
+
+;; PPC601 32-bit IU, FPU, BPU
+
+(define_insn_reservation "ppc601-load" 2
+ (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
+ load_l,store_c,sync")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601")
+
+(define_insn_reservation "ppc601-store" 2
+ (and (eq_attr "type" "store,store_ux,store_u")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601")
+
+(define_insn_reservation "ppc601-fpload" 3
+ (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601")
+
+(define_insn_reservation "ppc601-fpstore" 3
+ (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601+fpu_ppc601")
+
+(define_insn_reservation "ppc601-integer" 1
+ (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
+ trap,var_shift_rotate,cntlz,exts,isel")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601")
+
+(define_insn_reservation "ppc601-two" 1
+ (and (eq_attr "type" "two")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,iu_ppc601")
+
+(define_insn_reservation "ppc601-three" 1
+ (and (eq_attr "type" "three")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,iu_ppc601,iu_ppc601")
+
+(define_insn_reservation "ppc601-imul" 5
+ (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601*5")
+
+(define_insn_reservation "ppc601-idiv" 36
+ (and (eq_attr "type" "idiv")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601*36")
+
+; compare executes on integer unit, but feeds insns which
+; execute on the branch unit.
+(define_insn_reservation "ppc601-compare" 3
+ (and (eq_attr "type" "cmp,compare,delayed_compare,\
+ var_delayed_compare")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,nothing,bpu_ppc601")
+
+(define_insn_reservation "ppc601-fpcompare" 5
+ (and (eq_attr "type" "fpcompare")
+ (eq_attr "cpu" "ppc601"))
+ "(fpu_ppc601+iu_ppc601*2),nothing*2,bpu_ppc601")
+
+(define_insn_reservation "ppc601-fp" 4
+ (and (eq_attr "type" "fp")
+ (eq_attr "cpu" "ppc601"))
+ "fpu_ppc601")
+
+(define_insn_reservation "ppc601-dmul" 5
+ (and (eq_attr "type" "dmul")
+ (eq_attr "cpu" "ppc601"))
+ "fpu_ppc601*2")
+
+(define_insn_reservation "ppc601-sdiv" 17
+ (and (eq_attr "type" "sdiv")
+ (eq_attr "cpu" "ppc601"))
+ "fpu_ppc601*17")
+
+(define_insn_reservation "ppc601-ddiv" 31
+ (and (eq_attr "type" "ddiv")
+ (eq_attr "cpu" "ppc601"))
+ "fpu_ppc601*31")
+
+(define_insn_reservation "ppc601-mfcr" 2
+ (and (eq_attr "type" "mfcr")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,bpu_ppc601")
+
+(define_insn_reservation "ppc601-mtcr" 4
+ (and (eq_attr "type" "mtcr")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,bpu_ppc601")
+
+(define_insn_reservation "ppc601-crlogical" 4
+ (and (eq_attr "type" "cr_logical,delayed_cr")
+ (eq_attr "cpu" "ppc601"))
+ "bpu_ppc601")
+
+(define_insn_reservation "ppc601-mtjmpr" 4
+ (and (eq_attr "type" "mtjmpr")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,bpu_ppc601")
+
+(define_insn_reservation "ppc601-mfjmpr" 2
+ (and (eq_attr "type" "mfjmpr")
+ (eq_attr "cpu" "ppc601"))
+ "iu_ppc601,bpu_ppc601")
+
+(define_insn_reservation "ppc601-branch" 1
+ (and (eq_attr "type" "jmpreg,branch,isync")
+ (eq_attr "cpu" "ppc601"))
+ "bpu_ppc601")
+
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX version 4.3.
- Copyright (C) 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006,
- 2007, 2009, 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 1998-2012 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@gnu.org).
This file is part of GCC.
%{mcpu=power3: -m620} \
%{mcpu=power4: -m620} \
%{mcpu=powerpc: -mppc} \
-%{mcpu=rios: -mpwr} \
-%{mcpu=rios1: -mpwr} \
-%{mcpu=rios2: -mpwr2} \
-%{mcpu=rsc: -mpwr} \
-%{mcpu=rsc1: -mpwr} \
%{mcpu=rs64a: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX V5.
- Copyright (C) 2001, 2003, 2004, 2005, 2007, 2008, 2009, 2010
- Free Software Foundation, Inc.
+ Copyright (C) 2001-2012 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@gnu.org).
This file is part of GCC.
%{mcpu=power3: -m620} \
%{mcpu=power4: -m620} \
%{mcpu=powerpc: -mppc} \
-%{mcpu=rios: -mpwr} \
-%{mcpu=rios1: -mpwr} \
-%{mcpu=rios2: -mpwr2} \
-%{mcpu=rsc: -mpwr} \
-%{mcpu=rsc1: -mpwr} \
%{mcpu=rs64a: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
/* Subroutines for the gcc driver.
- Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright (C) 2007-2012 Free Software Foundation, Inc.
This file is part of GCC.
{
switch (_system_configuration.implementation)
{
- case 0x0001:
- return "rios1";
-
- case 0x0002:
- return "rsc";
-
- case 0x0004:
- return "rios2";
-
case 0x0008:
return "601";
{ "power6x", "%(asm_cpu_power6) -maltivec" },
{ "power7", "%(asm_cpu_power7)" },
{ "powerpc", "-mppc" },
- { "rios", "-mpwr" },
- { "rios1", "-mpwr" },
- { "rios2", "-mpwrx" },
- { "rsc", "-mpwr" },
- { "rsc1", "-mpwr" },
{ "rs64a", "-mppc64" },
{ "401", "-mppc" },
{ "403", "-m403" },
+++ /dev/null
-;; Scheduling description for IBM POWER processor.
-;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc.
-;;
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify it
-;; under the terms of the GNU General Public License as published
-;; by the Free Software Foundation; either version 3, or (at your
-;; option) any later version.
-
-;; GCC is distributed in the hope that it will be useful, but WITHOUT
-;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
-;; License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3. If not see
-;; <http://www.gnu.org/licenses/>.
-
-(define_automaton "rios1,rios1fp")
-(define_cpu_unit "iu_rios1" "rios1")
-(define_cpu_unit "fpu_rios1" "rios1fp")
-(define_cpu_unit "bpu_rios1" "rios1")
-
-;; RIOS1 32-bit IU, FPU, BPU
-
-(define_insn_reservation "rios1-load" 2
- (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
- load_l,store_c,sync")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1")
-
-(define_insn_reservation "rios1-store" 2
- (and (eq_attr "type" "store,store_ux,store_u")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1")
-
-(define_insn_reservation "rios1-fpload" 2
- (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
- (eq_attr "cpu" "rios1"))
- "iu_rios1")
-
-(define_insn_reservation "ppc601-fpload" 3
- (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
- (eq_attr "cpu" "ppc601"))
- "iu_rios1")
-
-(define_insn_reservation "rios1-fpstore" 3
- (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1+fpu_rios1")
-
-(define_insn_reservation "rios1-integer" 1
- (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
- trap,var_shift_rotate,cntlz,exts,isel")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1")
-
-(define_insn_reservation "rios1-two" 1
- (and (eq_attr "type" "two")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1,iu_rios1")
-
-(define_insn_reservation "rios1-three" 1
- (and (eq_attr "type" "three")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1,iu_rios1,iu_rios1")
-
-(define_insn_reservation "rios1-imul" 5
- (and (eq_attr "type" "imul,imul_compare")
- (eq_attr "cpu" "rios1"))
- "iu_rios1*5")
-
-(define_insn_reservation "rios1-imul2" 4
- (and (eq_attr "type" "imul2")
- (eq_attr "cpu" "rios1"))
- "iu_rios1*4")
-
-(define_insn_reservation "rios1-imul3" 3
- (and (eq_attr "type" "imul")
- (eq_attr "cpu" "rios1"))
- "iu_rios1*3")
-
-(define_insn_reservation "ppc601-imul" 5
- (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
- (eq_attr "cpu" "ppc601"))
- "iu_rios1*5")
-
-(define_insn_reservation "rios1-idiv" 19
- (and (eq_attr "type" "idiv")
- (eq_attr "cpu" "rios1"))
- "iu_rios1*19")
-
-(define_insn_reservation "ppc601-idiv" 36
- (and (eq_attr "type" "idiv")
- (eq_attr "cpu" "ppc601"))
- "iu_rios1*36")
-
-; compare executes on integer unit, but feeds insns which
-; execute on the branch unit.
-(define_insn_reservation "rios1-compare" 4
- (and (eq_attr "type" "cmp,fast_compare,compare")
- (eq_attr "cpu" "rios1"))
- "iu_rios1,nothing*2,bpu_rios1")
-
-(define_insn_reservation "rios1-delayed_compare" 5
- (and (eq_attr "type" "delayed_compare,var_delayed_compare")
- (eq_attr "cpu" "rios1"))
- "iu_rios1,nothing*3,bpu_rios1")
-
-(define_insn_reservation "ppc601-compare" 3
- (and (eq_attr "type" "cmp,compare,delayed_compare,\
- var_delayed_compare")
- (eq_attr "cpu" "ppc601"))
- "iu_rios1,nothing,bpu_rios1")
-
-(define_insn_reservation "rios1-fpcompare" 9
- (and (eq_attr "type" "fpcompare")
- (eq_attr "cpu" "rios1"))
- "fpu_rios1,nothing*3,bpu_rios1")
-
-(define_insn_reservation "ppc601-fpcompare" 5
- (and (eq_attr "type" "fpcompare")
- (eq_attr "cpu" "ppc601"))
- "(fpu_rios1+iu_rios1*2),nothing*2,bpu_rios1")
-
-(define_insn_reservation "rios1-fp" 2
- (and (eq_attr "type" "fp,dmul")
- (eq_attr "cpu" "rios1"))
- "fpu_rios1")
-
-(define_insn_reservation "ppc601-fp" 4
- (and (eq_attr "type" "fp")
- (eq_attr "cpu" "ppc601"))
- "fpu_rios1")
-
-(define_insn_reservation "rios1-dmul" 5
- (and (eq_attr "type" "dmul")
- (eq_attr "cpu" "ppc601"))
- "fpu_rios1*2")
-
-(define_insn_reservation "rios1-sdiv" 19
- (and (eq_attr "type" "sdiv,ddiv")
- (eq_attr "cpu" "rios1"))
- "fpu_rios1*19")
-
-(define_insn_reservation "ppc601-sdiv" 17
- (and (eq_attr "type" "sdiv")
- (eq_attr "cpu" "ppc601"))
- "fpu_rios1*17")
-
-(define_insn_reservation "ppc601-ddiv" 31
- (and (eq_attr "type" "ddiv")
- (eq_attr "cpu" "ppc601"))
- "fpu_rios1*31")
-
-(define_insn_reservation "rios1-mfcr" 2
- (and (eq_attr "type" "mfcr")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1,bpu_rios1")
-
-(define_insn_reservation "rios1-mtcr" 4
- (and (eq_attr "type" "mtcr")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1,bpu_rios1")
-
-(define_insn_reservation "rios1-crlogical" 4
- (and (eq_attr "type" "cr_logical,delayed_cr")
- (eq_attr "cpu" "rios1,ppc601"))
- "bpu_rios1")
-
-(define_insn_reservation "rios1-mtjmpr" 5
- (and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "rios1"))
- "iu_rios1,bpu_rios1")
-
-(define_insn_reservation "ppc601-mtjmpr" 4
- (and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "ppc601"))
- "iu_rios1,bpu_rios1")
-
-(define_insn_reservation "rios1-mfjmpr" 2
- (and (eq_attr "type" "mfjmpr")
- (eq_attr "cpu" "rios1,ppc601"))
- "iu_rios1,bpu_rios1")
-
-(define_insn_reservation "rios1-branch" 1
- (and (eq_attr "type" "jmpreg,branch,isync")
- (eq_attr "cpu" "rios1,ppc601"))
- "bpu_rios1")
-
+++ /dev/null
-;; Scheduling description for IBM Power2 processor.
-;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc.
-;;
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify it
-;; under the terms of the GNU General Public License as published
-;; by the Free Software Foundation; either version 3, or (at your
-;; option) any later version.
-
-;; GCC is distributed in the hope that it will be useful, but WITHOUT
-;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
-;; License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3. If not see
-;; <http://www.gnu.org/licenses/>.
-
-(define_automaton "rios2,rios2fp")
-(define_cpu_unit "iu1_rios2,iu2_rios2" "rios2")
-(define_cpu_unit "fpu1_rios2,fpu2_rios2" "rios2fp")
-(define_cpu_unit "bpu_rios2" "rios2")
-
-;; RIOS2 32-bit 2xIU, 2xFPU, BPU
-;; IU1 can perform all integer operations
-;; IU2 can perform all integer operations except imul and idiv
-
-(define_insn_reservation "rios2-load" 2
- (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\
- load_ux,load_u,fpload,fpload_ux,fpload_u,\
- load_l,store_c,sync")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2|iu2_rios2")
-
-(define_insn_reservation "rios2-store" 2
- (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2|iu2_rios2")
-
-(define_insn_reservation "rios2-integer" 1
- (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
- var_shift_rotate,cntlz,exts,isel")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2|iu2_rios2")
-
-(define_insn_reservation "rios2-two" 1
- (and (eq_attr "type" "two")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2")
-
-(define_insn_reservation "rios2-three" 1
- (and (eq_attr "type" "three")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2")
-
-(define_insn_reservation "rios2-imul" 2
- (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2*2")
-
-(define_insn_reservation "rios2-idiv" 13
- (and (eq_attr "type" "idiv")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2*13")
-
-; compare executes on integer unit, but feeds insns which
-; execute on the branch unit.
-(define_insn_reservation "rios2-compare" 3
- (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare,\
- var_delayed_compare")
- (eq_attr "cpu" "rios2"))
- "(iu1_rios2|iu2_rios2),nothing,bpu_rios2")
-
-(define_insn_reservation "rios2-fp" 2
- (and (eq_attr "type" "fp")
- (eq_attr "cpu" "rios2"))
- "fpu1_rios2|fpu2_rios2")
-
-(define_insn_reservation "rios2-fpcompare" 5
- (and (eq_attr "type" "fpcompare")
- (eq_attr "cpu" "rios2"))
- "(fpu1_rios2|fpu2_rios2),nothing*3,bpu_rios2")
-
-(define_insn_reservation "rios2-dmul" 2
- (and (eq_attr "type" "dmul")
- (eq_attr "cpu" "rios2"))
- "fpu1_rios2|fpu2_rios2")
-
-(define_insn_reservation "rios2-sdiv" 17
- (and (eq_attr "type" "sdiv,ddiv")
- (eq_attr "cpu" "rios2"))
- "(fpu1_rios2*17)|(fpu2_rios2*17)")
-
-(define_insn_reservation "rios2-ssqrt" 26
- (and (eq_attr "type" "ssqrt,dsqrt")
- (eq_attr "cpu" "rios2"))
- "(fpu1_rios2*26)|(fpu2_rios2*26)")
-
-(define_insn_reservation "rios2-mfcr" 2
- (and (eq_attr "type" "mfcr")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2,bpu_rios2")
-
-(define_insn_reservation "rios2-mtcr" 3
- (and (eq_attr "type" "mtcr")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2,bpu_rios2")
-
-(define_insn_reservation "rios2-crlogical" 3
- (and (eq_attr "type" "cr_logical,delayed_cr")
- (eq_attr "cpu" "rios2"))
- "bpu_rios2")
-
-(define_insn_reservation "rios2-mtjmpr" 5
- (and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2,bpu_rios2")
-
-(define_insn_reservation "rios2-mfjmpr" 2
- (and (eq_attr "type" "mfjmpr")
- (eq_attr "cpu" "rios2"))
- "iu1_rios2,bpu_rios2")
-
-(define_insn_reservation "rios2-branch" 1
- (and (eq_attr "type" "jmpreg,branch,isync")
- (eq_attr "cpu" "rios2"))
- "bpu_rios2")
-
/* IBM RS/6000 CPU names..
- Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 1991-2012 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GCC.
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
-RS6000_CPU ("rios", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
-RS6000_CPU ("rios1", PROCESSOR_RIOS1, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
-RS6000_CPU ("rios2", PROCESSOR_RIOS2,
- MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
-RS6000_CPU ("rsc", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
-RS6000_CPU ("rsc1", PROCESSOR_PPC601, MASK_POWER | MASK_MULTIPLE | MASK_STRING)
RS6000_CPU ("rs64", PROCESSOR_RS64A,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64)
/* Definitions of target machine needed for option handling for GNU compiler,
for IBM RS/6000.
- Copyright (C) 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2010-2012 Free Software Foundation, Inc.
Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
This file is part of GCC.
/* Processor type. Order must match cpu attribute in MD file. */
enum processor_type
{
- PROCESSOR_RIOS1,
- PROCESSOR_RIOS2,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
Enum(rs6000_cpu_opt_value) String(powerpc64) Value(54)
EnumValue
-Enum(rs6000_cpu_opt_value) String(rios) Value(55)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rios1) Value(56)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rios2) Value(57)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rsc) Value(58)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rsc1) Value(59)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(60)
+Enum(rs6000_cpu_opt_value) String(rs64) Value(55)
/* Subroutines used for code generation on IBM RS/6000.
- Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
- 2012
- Free Software Foundation, Inc.
+ Copyright (C) 1991-2012 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GCC.
0,
};
-/* Instruction costs on RIOS1 processors. */
-static const
-struct processor_costs rios1_cost = {
- COSTS_N_INSNS (5), /* mulsi */
- COSTS_N_INSNS (4), /* mulsi_const */
- COSTS_N_INSNS (3), /* mulsi_const9 */
- COSTS_N_INSNS (5), /* muldi */
- COSTS_N_INSNS (19), /* divsi */
- COSTS_N_INSNS (19), /* divdi */
- COSTS_N_INSNS (2), /* fp */
- COSTS_N_INSNS (2), /* dmul */
- COSTS_N_INSNS (19), /* sdiv */
- COSTS_N_INSNS (19), /* ddiv */
- 128, /* cache line size */
- 64, /* l1 cache */
- 512, /* l2 cache */
- 0, /* streams */
-};
-
-/* Instruction costs on RIOS2 processors. */
-static const
-struct processor_costs rios2_cost = {
- COSTS_N_INSNS (2), /* mulsi */
- COSTS_N_INSNS (2), /* mulsi_const */
- COSTS_N_INSNS (2), /* mulsi_const9 */
- COSTS_N_INSNS (2), /* muldi */
- COSTS_N_INSNS (13), /* divsi */
- COSTS_N_INSNS (13), /* divdi */
- COSTS_N_INSNS (2), /* fp */
- COSTS_N_INSNS (2), /* dmul */
- COSTS_N_INSNS (17), /* sdiv */
- COSTS_N_INSNS (17), /* ddiv */
- 256, /* cache line size */
- 256, /* l1 cache */
- 1024, /* l2 cache */
- 0, /* streams */
-};
-
/* Instruction costs on RS64A processors. */
static const
struct processor_costs rs64a_cost = {
else
switch (rs6000_cpu)
{
- case PROCESSOR_RIOS1:
- rs6000_cost = &rios1_cost;
- break;
-
- case PROCESSOR_RIOS2:
- rs6000_cost = &rios2_cost;
- break;
-
case PROCESSOR_RS64A:
rs6000_cost = &rs64a_cost;
break;
fprintf (stderr, "rs6000_conditional_register_usage called\n");
/* Set MQ register fixed (already call_used) if not POWER
- architecture (RIOS1, RIOS2, RSC, and PPC601) so that it will not
- be allocated. */
+ architecture (PPC601) so that it will not be allocated. */
if (! TARGET_POWER)
fixed_regs[64] = 1;
return 1;
switch (rs6000_cpu_attr) {
- case CPU_RIOS1: /* ? */
case CPU_RS64A:
case CPU_PPC601: /* ? */
case CPU_PPC7450:
case CPU_PPCE6500:
case CPU_TITAN:
return 2;
- case CPU_RIOS2:
case CPU_PPC476:
case CPU_PPC604:
case CPU_PPC604E:
/* Definitions of target machine for GNU compiler, for IBM RS/6000.
- Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
- 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 1992-2012 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GCC.
%{mcpu=power7: %(asm_cpu_power7)} \
%{mcpu=a2: -ma2} \
%{mcpu=powerpc: -mppc} \
-%{mcpu=rios: -mpwr} \
-%{mcpu=rios1: -mpwr} \
-%{mcpu=rios2: -mpwrx} \
-%{mcpu=rsc: -mpwr} \
-%{mcpu=rsc1: -mpwr} \
%{mcpu=rs64a: -mppc64} \
%{mcpu=401: -mppc} \
%{mcpu=403: -m403} \
/* Define generic processor types based upon current deployment. */
#define PROCESSOR_COMMON PROCESSOR_PPC601
-#define PROCESSOR_POWER PROCESSOR_RIOS1
+#define PROCESSOR_POWER PROCESSOR_PPC601
#define PROCESSOR_POWERPC PROCESSOR_PPC604
#define PROCESSOR_POWERPC64 PROCESSOR_RS64A
/* Define the default processor. This is overridden by other tm.h files. */
-#define PROCESSOR_DEFAULT PROCESSOR_RIOS1
+#define PROCESSOR_DEFAULT PROCESSOR_PPC603
#define PROCESSOR_DEFAULT64 PROCESSOR_RS64A
/* Specify the dialect of assembler to use. New mnemonics is dialect one
;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
-;; 2011, 2012
-;; Free Software Foundation, Inc.
+;; Copyright (C) 1990-2012 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GCC.
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan"
+(define_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan"
(const (symbol_ref "rs6000_cpu_attr")))
(automata_option "ndfa")
-(include "rios1.md")
-(include "rios2.md")
(include "rs64.md")
(include "mpc.md")
(include "40x.md")
(include "440.md")
(include "476.md")
+(include "601.md")
(include "603.md")
(include "6xx.md")
(include "7xx.md")
; Options for the rs6000 port of the compiler
;
-; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
-; Foundation, Inc.
+; Copyright (C) 2005-2012 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;; Current processor
TargetVariable
-enum processor_type rs6000_cpu = PROCESSOR_RIOS1
+enum processor_type rs6000_cpu = PROCESSOR_PPC603
;; Always emit branch hint bits.
TargetVariable
-# Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
-# 2006, 2011 Free Software Foundation, Inc.
+# Copyright (C) 1998-2012 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
mcpu?powerpc=mcpu?power3 \
mcpu?powerpc=mcpu?power4 \
mcpu?powerpc=mcpu?powerpc \
- mcpu?power=mcpu?rios1 \
- mcpu?power=mcpu?rios2 \
- mcpu?power=mcpu?rsc \
- mcpu?power=mcpu?rsc1 \
mcpu?powerpc=mcpu?rs64a \
mcpu?powerpc=mcpu?601 \
mcpu?powerpc=mcpu?602 \
# General rules that all rs6000/ targets must have.
#
-# Copyright (C) 1995, 1997, 1998, 1999, 2001, 2002, 2003, 2004, 2008, 2009,
-# 2010, 2011 Free Software Foundation, Inc.
+# Copyright (C) 1995-2012 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# The rs6000 backend doesn't cause warnings in these files.
insn-conditions.o-warn =
-MD_INCLUDES = $(srcdir)/config/rs6000/rios1.md \
- $(srcdir)/config/rs6000/rios2.md \
- $(srcdir)/config/rs6000/rs64.md \
+MD_INCLUDES = $(srcdir)/config/rs6000/rs64.md \
$(srcdir)/config/rs6000/mpc.md \
$(srcdir)/config/rs6000/40x.md \
$(srcdir)/config/rs6000/440.md \
+ $(srcdir)/config/rs6000/601.md \
$(srcdir)/config/rs6000/603.md \
$(srcdir)/config/rs6000/6xx.md \
$(srcdir)/config/rs6000/7xx.md \
projects / platform / upstream / gcc.git / commitdiff