MAINTAINERS: add spi to PolarFire SoC entry
authorConor Dooley <conor.dooley@microchip.com>
Tue, 7 Jun 2022 07:38:34 +0000 (08:38 +0100)
committerMark Brown <broonie@kernel.org>
Tue, 7 Jun 2022 12:57:08 +0000 (13:57 +0100)
Add the newly introduced spi driver to the existing PolarFire SoC entry.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220607073833.2331539-3-conor.dooley@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
MAINTAINERS

index a6d3bd9..be98829 100644 (file)
@@ -17143,6 +17143,7 @@ S:      Supported
 F:     arch/riscv/boot/dts/microchip/
 F:     drivers/mailbox/mailbox-mpfs.c
 F:     drivers/soc/microchip/
+F:     drivers/spi/spi-microchip-core.c
 F:     include/soc/microchip/mpfs.h
 
 RNBD BLOCK DRIVERS