drm/vc4: hdmi: Increase MAI fifo dreq threshold

Now we wait for write responses and have a burst
size of 4, we can set the fifo threshold much higher.

Set it to 28 (of the 32 entry size) to keep fifo
fuller and reduce chance of underflow.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index f1d9c27..54dbc1a 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2521,6 +2521,7 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
 {
        struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
        struct drm_device *drm = vc4_hdmi->connector.dev;
+       struct vc4_dev *vc4 = to_vc4_dev(drm);
        struct drm_encoder *encoder = &vc4_hdmi->encoder.base;
        unsigned int sample_rate = params->sample_rate;
        unsigned int channels = params->channels;
@@ -2579,11 +2580,18 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
                                             VC4_HDMI_AUDIO_PACKET_CEA_MASK);
 
        /* Set the MAI threshold */
-       HDMI_WRITE(HDMI_MAI_THR,
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) |
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) |
-                  VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) |
-                  VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW));
+       if (vc4->is_vc5)
+               HDMI_WRITE(HDMI_MAI_THR,
+                       VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
+                       VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
+                       VC4_SET_FIELD(0x1c, VC4_HD_MAI_THR_DREQHIGH) |
+                       VC4_SET_FIELD(0x1c, VC4_HD_MAI_THR_DREQLOW));
+       else
+               HDMI_WRITE(HDMI_MAI_THR,
+                       VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_PANICHIGH) |
+                       VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_PANICLOW) |
+                       VC4_SET_FIELD(0x6, VC4_HD_MAI_THR_DREQHIGH) |
+                       VC4_SET_FIELD(0x8, VC4_HD_MAI_THR_DREQLOW));
 
        HDMI_WRITE(HDMI_MAI_CONFIG,
                   VC4_HDMI_MAI_CONFIG_BIT_REVERSE |