ath9k_hw: Get AHB clock information from ath9k_platform_data
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Tue, 19 Apr 2011 13:59:01 +0000 (19:29 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 25 Apr 2011 18:50:08 +0000 (14:50 -0400)
Add a bool in ath9k_platform_data to pass AHB clock speed information.
Driver needs this to configure PLL on some SOCs.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.h
drivers/net/wireless/ath/ath9k/init.c
include/linux/ath9k_platform.h

index 450b642..5a4ba09 100644 (file)
@@ -846,6 +846,8 @@ struct ath_hw {
 
        /* Enterprise mode cap */
        u32 ent_mode;
+
+       bool is_clk_25mhz;
 };
 
 struct ath_bus_ops {
index 1ac8318..e78b6ae 100644 (file)
@@ -574,6 +574,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
                sc->sc_ah->gpio_mask = pdata->gpio_mask;
                sc->sc_ah->gpio_val = pdata->gpio_val;
                sc->sc_ah->led_pin = pdata->led_pin;
+               ah->is_clk_25mhz = pdata->is_clk_25mhz;
        }
 
        common = ath9k_hw_common(ah);
index 020387a..60a7c49 100644 (file)
@@ -28,6 +28,8 @@ struct ath9k_platform_data {
        int led_pin;
        u32 gpio_mask;
        u32 gpio_val;
+
+       bool is_clk_25mhz;
 };
 
 #endif /* _LINUX_ATH9K_PLATFORM_H */