gallium/radeon: replace is_flushing_texture with db_compatible

This is a left-over of when I considered generalizing the separate stencil
support. I do prefer the new name since it emphasizes what flushing vs.
non-flushing means from a functional point-of-view, namely special handling
of the texture format.

v2: adjust r600_init_color_surface as well

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index fab0359..fe4f14c 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -702,14 +702,16 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
        surflevel = tmp->surface.level;
 
        /* Texturing with separate depth and stencil. */
-       if (tmp->is_depth && !tmp->is_flushing_texture) {
+       if (tmp->db_compatible) {
                switch (pipe_format) {
                case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
                        pipe_format = PIPE_FORMAT_Z32_FLOAT;
                        break;
                case PIPE_FORMAT_X8Z24_UNORM:
                case PIPE_FORMAT_S8_UINT_Z24_UNORM:
-                       /* Z24 is always stored like this. */
+                       /* Z24 is always stored like this for DB
+                        * compatibility.
+                        */
                        pipe_format = PIPE_FORMAT_Z24X8_UNORM;
                        break;
                case PIPE_FORMAT_X24S8_UINT:
@@ -724,7 +726,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
        }
 
        if (R600_BIG_ENDIAN)
-               do_endian_swap = !(tmp->is_depth && !tmp->is_flushing_texture);
+               do_endian_swap = !tmp->db_compatible;
 
        format = r600_translate_texformat(ctx->screen, pipe_format,
                                          swizzle,
@@ -868,7 +870,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
                                      S_03001C_BANK_HEIGHT(bankh) |
                                      S_03001C_MACRO_TILE_ASPECT(macro_aspect) |
                                      S_03001C_NUM_BANKS(nbanks) |
-                                     S_03001C_DEPTH_SAMPLE_ORDER(tmp->is_depth && !tmp->is_flushing_texture);
+                                     S_03001C_DEPTH_SAMPLE_ORDER(tmp->db_compatible);
        return &view->base;
 }
 
@@ -1088,7 +1090,7 @@ void evergreen_init_color_surface(struct r600_context *rctx,
        }
 
        if (R600_BIG_ENDIAN)
-               do_endian_swap = !(rtex->is_depth && !rtex->is_flushing_texture);
+               do_endian_swap = !rtex->db_compatible;
 
        format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format,
                                                      do_endian_swap);

diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 6e5675b..a6c5b44 100644 (file)
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -275,7 +275,7 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
                rview = (struct r600_pipe_sampler_view*)view;
 
                tex = (struct r600_texture *)view->texture;
-               assert(tex->is_depth && !tex->is_flushing_texture);
+               assert(tex->db_compatible);
 
                if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) {
                        r600_blit_decompress_depth_in_place(rctx, tex,
@@ -372,7 +372,7 @@ static bool r600_decompress_subresource(struct pipe_context *ctx,
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct r600_texture *rtex = (struct r600_texture*)tex;
 
-       if (rtex->is_depth && !rtex->is_flushing_texture) {
+       if (rtex->db_compatible) {
                if (r600_can_sample_zs(rtex, false)) {
                        r600_blit_decompress_depth_in_place(rctx, rtex, false,
                                                   level, level,

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index ea551be..5b47089 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -695,7 +695,7 @@ r600_create_sampler_view_custom(struct pipe_context *ctx,
        swizzle[3] = state->swizzle_a;
 
        if (R600_BIG_ENDIAN)
-               do_endian_swap = !(tmp->is_depth && !tmp->is_flushing_texture);
+               do_endian_swap = !tmp->db_compatible;
 
        format = r600_translate_texformat(ctx->screen, state->format,
                                          swizzle,
@@ -842,7 +842,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
        int i;
        bool blend_bypass = 0, blend_clamp = 1, do_endian_swap = FALSE;
 
-       if (rtex->is_depth && !rtex->is_flushing_texture && !r600_can_sample_zs(rtex, false)) {
+       if (rtex->db_compatible && !r600_can_sample_zs(rtex, false)) {
                r600_init_flushed_depth_texture(&rctx->b.b, surf->base.texture, NULL);
                rtex = rtex->flushed_depth_texture;
                assert(rtex);
@@ -895,7 +895,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
        }
 
        if (R600_BIG_ENDIAN)
-               do_endian_swap = !(rtex->is_depth && !rtex->is_flushing_texture);
+               do_endian_swap = !rtex->db_compatible;
 
        format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format,
                                                      do_endian_swap);

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 4b282d0..11ef925 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -640,7 +640,7 @@ static void r600_set_sampler_views(struct pipe_context *pipe, unsigned shader,
                                (struct r600_texture*)rviews[i]->base.texture;
                        bool is_buffer = rviews[i]->base.texture->target == PIPE_BUFFER;
 
-                       if (!is_buffer && rtex->is_depth && !rtex->is_flushing_texture) {
+                       if (!is_buffer && rtex->db_compatible) {
                                dst->views.compressed_depthtex_mask |= 1 << i;
                        } else {
                                dst->views.compressed_depthtex_mask &= ~(1 << i);

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 1840640..d8736c6 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -242,12 +242,12 @@ struct r600_texture {
        uint64_t                        size;
        unsigned                        num_level0_transfers;
        bool                            is_depth;
+       bool                            db_compatible;
        bool                            can_sample_z;
        bool                            can_sample_s;
        unsigned                        dirty_level_mask; /* each bit says if that mipmap is compressed */
        unsigned                        stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
        struct r600_texture             *flushed_depth_texture;
-       bool                            is_flushing_texture;
        struct radeon_surf              surface;
 
        /* Colorbuffer compression and fast clear. */

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 6b88fc1..99c7f35 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1041,6 +1041,8 @@ r600_texture_create_object(struct pipe_screen *screen,
 
                if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER |
                                     R600_RESOURCE_FLAG_FLUSHED_DEPTH))) {
+                       rtex->db_compatible = true;
+
                        if (!(rscreen->debug_flags & DBG_NO_HYPERZ))
                                r600_texture_allocate_htile(rscreen, rtex);
                }
@@ -1298,7 +1300,6 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
                return false;
        }
 
-       (*flushed_depth_texture)->is_flushing_texture = true;
        (*flushed_depth_texture)->non_disp_tiling = false;
        return true;
 }

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 1148787..26ce820 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -293,7 +293,7 @@ si_flush_depth_textures(struct si_context *sctx,
                sview = (struct si_sampler_view*)view;
 
                tex = (struct r600_texture *)view->texture;
-               assert(tex->is_depth && !tex->is_flushing_texture);
+               assert(tex->db_compatible);
 
                si_blit_decompress_zs_in_place(sctx, tex,
                                               sview->is_stencil_sampler ? PIPE_MASK_S
@@ -696,7 +696,7 @@ static void si_decompress_subresource(struct pipe_context *ctx,
        struct si_context *sctx = (struct si_context *)ctx;
        struct r600_texture *rtex = (struct r600_texture*)tex;
 
-       if (rtex->is_depth && !rtex->is_flushing_texture) {
+       if (rtex->db_compatible) {
                planes &= PIPE_MASK_Z | PIPE_MASK_S;
 
                if (!(rtex->surface.flags & RADEON_SURF_SBUFFER))

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index d1cd3c4..3def237 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -391,7 +391,7 @@ static void si_set_sampler_view(struct si_context *sctx,
 
                if (view->texture && view->texture->target != PIPE_BUFFER) {
                        bool is_separate_stencil =
-                               rtex->is_depth && !rtex->is_flushing_texture &&
+                               rtex->db_compatible &&
                                rview->is_stencil_sampler;
 
                        si_set_mutable_tex_desc_fields(rtex,
@@ -464,7 +464,7 @@ static void si_set_sampler_views(struct pipe_context *ctx,
                        struct r600_texture *rtex =
                                (struct r600_texture*)views[i]->texture;
 
-                       if (rtex->is_depth && !rtex->is_flushing_texture) {
+                       if (rtex->db_compatible) {
                                samplers->depth_texture_mask |= 1u << slot;
                        } else {
                                samplers->depth_texture_mask &= ~(1u << slot);

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 26831fa..ad63dab 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2980,14 +2980,16 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
        pipe_format = state->format;
        surflevel = tmp->surface.level;
 
-       if (tmp->is_depth && !tmp->is_flushing_texture) {
+       if (tmp->db_compatible) {
                switch (pipe_format) {
                case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
                        pipe_format = PIPE_FORMAT_Z32_FLOAT;
                        break;
                case PIPE_FORMAT_X8Z24_UNORM:
                case PIPE_FORMAT_S8_UINT_Z24_UNORM:
-                       /* Z24 is always stored like this. */
+                       /* Z24 is always stored like this for DB
+                        * compatibility.
+                        */
                        pipe_format = PIPE_FORMAT_Z24X8_UNORM;
                        break;
                case PIPE_FORMAT_X24S8_UINT: