2013-12-19 Monk Chiang <sh.chiang04@gmail.com>

gcc/
	* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
	Consider TARGET_CPU_DEFAULT settings.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206106 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 660deeb..5cd1422 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-12-19  Monk Chiang  <sh.chiang04@gmail.com>
+
+       * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
+       Consider TARGET_CPU_DEFAULT settings.
+
 2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>
 
        * config/aarch64/aarch64-cores.def: Add support for

diff --git a/gcc/common/config/nds32/nds32-common.c b/gcc/common/config/nds32/nds32-common.c
index f82f725..6a2ef81 100644 (file)
--- a/gcc/common/config/nds32/nds32-common.c
+++ b/gcc/common/config/nds32/nds32-common.c
@@ -86,14 +86,23 @@ static const struct default_options nds32_option_optimization_table[] =
 \f
 /* Run-time Target Specification.  */
 
-/* Default enable
+/* The default target flags consist of
+   TARGET_CPU_DEFAULT and other MASK_XXX flags.
+
+   The value of TARGET_CPU_DEFAULT is set by
+   the process of 'configure' and 'make' stage.
+   Please check gcc/config.gcc for more implementation detail.
+
+   Other MASK_XXX flags are set individually.
+   By default we enable
      TARGET_GP_DIRECT: Generate gp-imply instruction.
      TARGET_16_BIT   : Generate 16/32 bit mixed length instruction.
      TARGET_PERF_EXT : Generate performance extention instrcution.
      TARGET_CMOV     : Generate conditional move instruction.  */
 #undef TARGET_DEFAULT_TARGET_FLAGS
 #define TARGET_DEFAULT_TARGET_FLAGS            \
-  (MASK_GP_DIRECT                              \
+  (TARGET_CPU_DEFAULT                          \
+   | MASK_GP_DIRECT                            \
    | MASK_16_BIT                               \
    | MASK_PERF_EXT                             \
    | MASK_CMOV)