arm64: dts: imx93: reorder device nodes
authorPeng Fan <peng.fan@nxp.com>
Wed, 10 May 2023 08:31:51 +0000 (16:31 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 15 May 2023 03:30:14 +0000 (11:30 +0800)
Reorder device nodes per address
 - Move eqos node after fec node
 - Move mediamix node after mlmix node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93.dtsi

index 8354d17a6a3f8a3db0c9dcb25a00a795882c1bf7..5c5652ae4ee07cc2bf3e6a04590e1573af3a3689 100644 (file)
                                #size-cells = <1>;
                                ranges;
 
-                               mediamix: power-domain@44462400 {
-                                       compatible = "fsl,imx93-src-slice";
-                                       reg = <0x44462400 0x400>, <0x44465800 0x400>;
-                                       #power-domain-cells = <0>;
-                                       clocks = <&clk IMX93_CLK_MEDIA_AXI>,
-                                                <&clk IMX93_CLK_MEDIA_APB>;
-                               };
-
                                mlmix: power-domain@44461800 {
                                        compatible = "fsl,imx93-src-slice";
                                        reg = <0x44461800 0x400>, <0x44464800 0x400>;
                                        clocks = <&clk IMX93_CLK_ML_APB>,
                                                 <&clk IMX93_CLK_ML>;
                                };
+
+                               mediamix: power-domain@44462400 {
+                                       compatible = "fsl,imx93-src-slice";
+                                       reg = <0x44462400 0x400>, <0x44465800 0x400>;
+                                       #power-domain-cells = <0>;
+                                       clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+                                                <&clk IMX93_CLK_MEDIA_APB>;
+                               };
                        };
 
                        anatop: anatop@44480000 {
                                status = "disabled";
                        };
 
-                       eqos: ethernet@428a0000 {
-                               compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
-                               reg = <0x428a0000 0x10000>;
-                               interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
-                               interrupt-names = "macirq", "eth_wake_irq";
-                               clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
-                                        <&clk IMX93_CLK_ENET_QOS_GATE>,
-                                        <&clk IMX93_CLK_ENET_TIMER2>,
-                                        <&clk IMX93_CLK_ENET>,
-                                        <&clk IMX93_CLK_ENET_QOS_GATE>;
-                               clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
-                               assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
-                                                 <&clk IMX93_CLK_ENET>;
-                               assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
-                                                        <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
-                               assigned-clock-rates = <100000000>, <250000000>;
-                               intf_mode = <&wakeupmix_gpr 0x28>;
-                               snps,clk-csr = <0>;
-                               status = "disabled";
-                       };
-
                        fec: ethernet@42890000 {
                                compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
                                reg = <0x42890000 0x10000>;
                                status = "disabled";
                        };
 
+                       eqos: ethernet@428a0000 {
+                               compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
+                               reg = <0x428a0000 0x10000>;
+                               interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "macirq", "eth_wake_irq";
+                               clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
+                                        <&clk IMX93_CLK_ENET_QOS_GATE>,
+                                        <&clk IMX93_CLK_ENET_TIMER2>,
+                                        <&clk IMX93_CLK_ENET>,
+                                        <&clk IMX93_CLK_ENET_QOS_GATE>;
+                               clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
+                               assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
+                                                 <&clk IMX93_CLK_ENET>;
+                               assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
+                                                        <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
+                               assigned-clock-rates = <100000000>, <250000000>;
+                               intf_mode = <&wakeupmix_gpr 0x28>;
+                               snps,clk-csr = <0>;
+                               status = "disabled";
+                       };
+
                        usdhc3: mmc@428b0000 {
                                compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
                                reg = <0x428b0000 0x10000>;