radeonsi: use wave size to determine index stride
authorLang Yu <lang.yu@amd.com>
Sun, 27 Aug 2023 11:56:49 +0000 (19:56 +0800)
committerMarge Bot <emma+marge@anholt.net>
Thu, 31 Aug 2023 20:30:03 +0000 (20:30 +0000)
Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24920>

src/gallium/drivers/radeonsi/si_compute.c

index 619b8f9..d4d71a2 100644 (file)
@@ -577,7 +577,8 @@ static void setup_scratch_rsrc_user_sgprs(struct si_context *sctx,
 
    /* Disable address clamping */
    uint32_t scratch_dword2 = 0xffffffff;
-   uint32_t scratch_dword3 = S_008F0C_INDEX_STRIDE(3) | S_008F0C_ADD_TID_ENABLE(1);
+   uint32_t index_stride = sctx->cs_shader_state.program->shader.wave_size == 32 ? 2 : 3;
+   uint32_t scratch_dword3 = S_008F0C_INDEX_STRIDE(index_stride) | S_008F0C_ADD_TID_ENABLE(1);
 
    if (sctx->gfx_level >= GFX9) {
       assert(max_private_element_size == 1); /* only 4 bytes on GFX9 */