}
nir_ssa_def *address = instr->src[address_index].ssa;
- nir_ssa_def *new_address = nir_ishr(b, address, nir_imm_int(b, 4 * align));
+ nir_ssa_def *new_address = nir_ishr_imm(b, address, 4 * align);
nir_instr_rewrite_src(&instr->instr,
&instr->src[address_index],
array_stride *= glsl_get_aoa_size(d->type);
offset =
- nir_iadd(b, offset, nir_imul(b, d->arr.index.ssa, nir_imm_int(b, array_stride)));
+ nir_iadd(b, offset, nir_imul_imm(b, d->arr.index.ssa, array_stride));
}
/* Since the first source is a deref and the first source in the lowered
bool start_even = (writemask & (1u << (2 * i)));
auto addr2 =
- nir_iadd(&b, addr, nir_imm_int(&b, 8 * i + (start_even ? 0 : 4)));
+ nir_iadd_imm(&b, addr, 8 * i + (start_even ? 0 : 4));
store->src[1] = nir_src_for_ssa(addr2);
nir_builder_instr_insert(&b, &store->instr);
auto idx2 = nir_src_as_const_value(op->src[1]);
if (!idx2 || idx2->u32 != 0)
- offset = nir_iadd(b, nir_ishl(b, op->src[1].ssa, nir_imm_int(b, 4)), offset);
+ offset = nir_iadd(b, nir_ishl_imm(b, op->src[1].ssa, 4), offset);
return nir_iadd(b, addr, offset);
}
nir_ssa_def *addr2 =
r600_umad_24(b, nir_channel(b, base, 1), op->src[src_offset].ssa, addr1);
int offset = get_tcs_varying_offset(op);
- return nir_iadd(b,
- nir_iadd(b,
- addr2,
- nir_ishl(b, op->src[src_offset + 1].ssa, nir_imm_int(b, 4))),
- nir_imm_int(b, offset));
+ return nir_iadd_imm(b,
+ nir_iadd(b,
+ addr2,
+ nir_ishl_imm(b, op->src[src_offset + 1].ssa, 4)),
+ offset);
}
static nir_ssa_def *
nir_ssa_def *addr_outer = nir_iadd(b, addr, load_offset_group_from_mask(b, mask));
if (nir_intrinsic_component(op))
addr_outer =
- nir_iadd(b, addr_outer, nir_imm_int(b, 4 * nir_intrinsic_component(op)));
+ nir_iadd_imm(b, addr_outer, 4 * nir_intrinsic_component(op));
auto new_load = nir_load_local_shared_r600(b, 32, addr_outer);
store_tcs_out->num_components = store_tcs_out->src[0].ssa->num_components;
bool start_even = (orig_writemask & (1u << (2 * i)));
- auto addr2 = nir_iadd(b, addr, nir_imm_int(b, 8 * i + (start_even ? 0 : 4)));
+ auto addr2 = nir_iadd_imm(b, addr, 8 * i + (start_even ? 0 : 4));
store_tcs_out->src[1] = nir_src_for_ssa(addr2);
nir_builder_instr_insert(b, &store_tcs_out->instr);
int src_offset)
{
int offset = get_tcs_varying_offset(op);
- return nir_iadd(b,
- nir_iadd(b,
- addr,
- nir_ishl(b, op->src[src_offset].ssa, nir_imm_int(b, 4))),
- nir_imm_int(b, offset));
+ return nir_iadd_imm(b,
+ nir_iadd(b,
+ addr,
+ nir_ishl_imm(b, op->src[src_offset].ssa, 4)),
+ offset);
}
inline unsigned
out_addr0,
nir_channel(b, &tf_outer->dest.ssa, chanx)));
- tf_out.push_back(nir_vec2(b, nir_iadd(b, out_addr0, nir_imm_int(b, 4)),
+ tf_out.push_back(nir_vec2(b, nir_iadd_imm(b, out_addr0, 4),
nir_channel(b, &tf_outer->dest.ssa, chany)));
if (outer_comps > 2) {
tf_out.push_back(nir_vec2(b,
- nir_iadd(b, out_addr0, nir_imm_int(b, 8)),
+ nir_iadd_imm(b, out_addr0, 8),
nir_channel(b, &tf_outer->dest.ssa, 2)));
}
if (outer_comps > 3) {
tf_out.push_back(nir_vec2(b,
- nir_iadd(b, out_addr0, nir_imm_int(b, 12)),
+ nir_iadd_imm(b, out_addr0, 12),
nir_channel(b, &tf_outer->dest.ssa, 3)));
inner_base = 16;
nir_builder_instr_insert(b, &tf_inner->instr);
tf_out.push_back(nir_vec2(b,
- nir_iadd(b, out_addr0, nir_imm_int(b, inner_base)),
+ nir_iadd_imm(b, out_addr0, inner_base),
nir_channel(b, &tf_inner->dest.ssa, 0)));
if (inner_comps > 1) {
tf_out.push_back(nir_vec2(b,
- nir_iadd(b, out_addr0, nir_imm_int(b, inner_base + 4)),
+ nir_iadd_imm(b, out_addr0, inner_base + 4),
nir_channel(b, &tf_inner->dest.ssa, 1)));
}