This reverts commit r350685.
See compile assert in compiler-rt.
llvm-svn: 350693
}
}
- unsigned SrcReg1 = getRegForValue(SrcValue1);
- if (SrcReg1 == 0)
- return false;
-
- unsigned SrcReg2 = 0;
- if (!UseImm) {
- SrcReg2 = getRegForValue(SrcValue2);
- if (SrcReg2 == 0)
- return false;
- }
-
unsigned CmpOpc;
bool NeedsExt = false;
- auto RC = MRI.getRegClass(SrcReg1);
switch (SrcVT.SimpleTy) {
default: return false;
case MVT::f32:
CmpOpc = PPC::EFSCMPGT;
break;
}
- } else if (isVSSRCRegClass(RC)) {
- llvm_unreachable("Unsupposed f32 VSX comparison");
- } else {
+ } else
CmpOpc = PPC::FCMPUS;
- }
break;
case MVT::f64:
if (HasSPE) {
CmpOpc = PPC::EFDCMPGT;
break;
}
- } else if (isVSFRCRegClass(RC)) {
- CmpOpc = PPC::XSCMPUDP;
- } else {
+ } else
CmpOpc = PPC::FCMPUD;
- }
break;
case MVT::i1:
case MVT::i8:
break;
}
+ unsigned SrcReg1 = getRegForValue(SrcValue1);
+ if (SrcReg1 == 0)
+ return false;
+
+ unsigned SrcReg2 = 0;
+ if (!UseImm) {
+ SrcReg2 = getRegForValue(SrcValue2);
+ if (SrcReg2 == 0)
+ return false;
+ }
+
if (NeedsExt) {
unsigned ExtReg = createResultReg(&PPC::GPRCRegClass);
if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt))
-; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux-gnu -fast-isel -O0 < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64le-unknown-linux-gnu -fast-isel -O0 < %s | FileCheck %s
define i1 @TestULT(double %t0) {
; CHECK-LABEL: TestULT:
define i1 @TestULE(double %t0) {
; CHECK-LABEL: TestULE:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: ble
; CHECK: blr
entry:
define i1 @TestUNE(double %t0) {
; CHECK-LABEL: TestUNE:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: bne
; CHECK: blr
entry:
define i1 @TestUGE(double %t0) {
; CHECK-LABEL: TestUGE:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: bge
; CHECK: blr
entry:
define i1 @TestOLT(double %t0) {
; CHECK-LABEL: TestOLT:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: blt
; CHECK: blr
entry:
define i1 @TestOEQ(double %t0) {
; CHECK-LABEL: TestOEQ:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: beq
; CHECK: blr
entry:
define i1 @TestOGT(double %t0) {
; CHECK-LABEL: TestOGT:
-; CHECK: xscmpudp
+; CHECK: fcmpu
; CHECK-NEXT: bgt
; CHECK: blr
entry:
-; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s -verify-machineinstrs | FileCheck %s
-; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck %s
+; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"