* config/i386/i386.h (TARGET_FISTTP): Enable also for

        TARGET_SSE3 and only for TARGET_80387.
        * config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1,
        (fix_trunc<mode>_i387_fisttp, fix_trunc<mode>_i387_fisttp_with_temp):
        Do not depend on TARGET_80387.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@104947 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c8025e5..16caced 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2005-10-04  Uros Bizjak  <uros@kss-loka.si>
+
+       * config/i386/i386.h (TARGET_FISTTP): Enable also for
+       TARGET_SSE3 and only for TARGET_80387.
+       * config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1,
+       (fix_trunc<mode>_i387_fisttp, fix_trunc<mode>_i387_fisttp_with_temp):
+       Do not depend on TARGET_80387.
+
 2005-10-04  Andrew Pinski  <pinskia@physics.uc.edu>
 
        * tree.c (last_annotated_node): Change type to location_t*.

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 3213ee5..a00e0e0 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -173,7 +173,8 @@ extern int x86_prefetch_sse;
 /* For sane SSE instruction set generation we need fcomi instruction.  It is
    safe to enable all CMOVE instructions.  */
 #define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
-#define TARGET_FISTTP (x86_fisttp & (1 << ix86_arch))
+#define TARGET_FISTTP (((x86_fisttp & (1 << ix86_arch)) || TARGET_SSE3) \
+                       && TARGET_80387)
 #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK)
 #define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK)
 #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6b1beaf..f8059ad 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4069,7 +4069,7 @@
   [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
                   (fix:SI (match_operand:SSEMODEF 1 "register_operand" "")))
              (clobber (reg:CC FLAGS_REG))])]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode))"
+  "TARGET_80387 || SSE_FLOAT_MODE_P (<MODE>mode)"
 {
   if (TARGET_FISTTP
       && !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH))
@@ -4162,7 +4162,7 @@
 (define_insn_and_split "fix_trunc<mode>_fisttp_i387_1"
   [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r")
        (fix:X87MODEI (match_operand 1 "register_operand" "f,f")))]
-  "TARGET_80387 && TARGET_FISTTP
+  "TARGET_FISTTP
    && FLOAT_MODE_P (GET_MODE (operands[1]))
    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
         && (TARGET_64BIT || <MODE>mode != DImode))
@@ -4190,7 +4190,7 @@
   [(set (match_operand:X87MODEI 0 "memory_operand" "=m")
        (fix:X87MODEI (match_operand 1 "register_operand" "f")))
    (clobber (match_scratch:XF 2 "=&1f"))]
-  "TARGET_80387 && TARGET_FISTTP
+  "TARGET_FISTTP
    && FLOAT_MODE_P (GET_MODE (operands[1]))
    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
         && (TARGET_64BIT || <MODE>mode != DImode))
@@ -4204,7 +4204,7 @@
        (fix:X87MODEI (match_operand 1 "register_operand" "f,f")))
    (clobber (match_operand:X87MODEI 2 "memory_operand" "=m,m"))
    (clobber (match_scratch:XF 3 "=&1f,&1f"))]
-  "TARGET_80387 && TARGET_FISTTP
+  "TARGET_FISTTP
    && FLOAT_MODE_P (GET_MODE (operands[1]))
    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
        && (TARGET_64BIT || <MODE>mode != DImode))