mt76x0: correct RF reg pairs write for PCIe

We have to use RF CSR method for PCIe.

Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>

diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
index fb2cf39..d4483a5 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
+++ b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
@@ -173,9 +173,22 @@ rf_clear(struct mt76x02_dev *dev, u32 offset, u8 mask)
 }
 #endif
 
-#define RF_RANDOM_WRITE(dev, tab)              \
-       mt76_wr_rp(dev, MT_MCU_MEMMAP_RF,       \
-                  tab, ARRAY_SIZE(tab))
+static void
+mt76x0_rf_csr_wr_rp(struct mt76x02_dev *dev, const struct mt76_reg_pair *data,
+                   int n)
+{
+       while (n-- > 0) {
+               mt76x0_rf_csr_wr(dev, data->reg, data->value);
+               data++;
+       }
+}
+
+#define RF_RANDOM_WRITE(dev, tab) do {                                 \
+       if (mt76_is_mmio(dev))                                          \
+               mt76x0_rf_csr_wr_rp(dev, tab, ARRAY_SIZE(tab));         \
+       else                                                            \
+               mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, tab, ARRAY_SIZE(tab));\
+} while (0)
 
 int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev)
 {