MIPS: Compile post DMA flush only when needed

dma_sync_phys() is only called for some CPUs when a mapping is removed.
Add ARCH_HAS_SYNC_DMA_FOR_CPU only for the CPUs listed in
cpu_needs_post_dma_flush() which need this extra call and do not compile
this code in for other CPUs. We need this for R10000, R12000, BMIPS5000
CPUs and CPUs supporting MAAR which was introduced in MIPS32r5.

This will hopefully improve the performance of the not affected devices.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: linux-mips@vger.kernel.org
Cc: nbd@nbd.name

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7872907..2406757 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1124,7 +1124,6 @@ config DMA_NONCOHERENT
        bool
        select ARCH_HAS_DMA_MMAP_PGPROT
        select ARCH_HAS_SYNC_DMA_FOR_DEVICE
-       select ARCH_HAS_SYNC_DMA_FOR_CPU
        select NEED_DMA_MAP_STATE
        select ARCH_HAS_DMA_COHERENT_TO_PFN
        select DMA_NONCOHERENT_CACHE_SYNC
@@ -1928,9 +1927,11 @@ config SYS_HAS_CPU_MIPS32_R3_5
 
 config SYS_HAS_CPU_MIPS32_R5
        bool
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
 
 config SYS_HAS_CPU_MIPS32_R6
        bool
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
 
 config SYS_HAS_CPU_MIPS64_R1
        bool
@@ -1940,6 +1941,7 @@ config SYS_HAS_CPU_MIPS64_R2
 
 config SYS_HAS_CPU_MIPS64_R6
        bool
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
 
 config SYS_HAS_CPU_R3000
        bool
@@ -1976,6 +1978,7 @@ config SYS_HAS_CPU_R8000
 
 config SYS_HAS_CPU_R10000
        bool
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
 
 config SYS_HAS_CPU_RM7000
        bool
@@ -2004,6 +2007,7 @@ config SYS_HAS_CPU_BMIPS4380
 config SYS_HAS_CPU_BMIPS5000
        bool
        select SYS_HAS_CPU_BMIPS
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
 
 config SYS_HAS_CPU_XLR
        bool

diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index cb38461..f7e0fd6 100644 (file)
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -145,12 +145,14 @@ void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
        dma_sync_phys(paddr, size, dir);
 }
 
+#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
 void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
                size_t size, enum dma_data_direction dir)
 {
        if (cpu_needs_post_dma_flush(dev))
                dma_sync_phys(paddr, size, dir);
 }
+#endif
 
 void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)