tu: Fix VS primid with tess + GS

If tess is enabled, then VS chains to the HS and we have to use the HS
value for the PrimID sysval. This is still true if GS is also enabled,
so we need to use the HS instead of the GS if both are enabled.  In
particular if the HS or DS uses gl_PrimitiveID but the GS doesn't then
we still need to setup the register.

This fixes a bunch of dEQP-VK.tessellation.invariance.primitive_set.*
cases on a650, although it seems they managed to still pass on a630 with
the broken PrimID handling.

Fixes: 8115cde3ba6 ("tu, freedreno/a6xx, ir3: Rewrite tess PrimID handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12768>

diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index 02276ec..2284877 100644 (file)
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -680,11 +680,9 @@ tu6_emit_vs_system_values(struct tu_cs *cs,
    const uint32_t gs_primitiveid_regid = gs ?
          ir3_find_sysval_regid(gs, SYSTEM_VALUE_PRIMITIVE_ID) :
          regid(63, 0);
-   const uint32_t hs_primitiveid_regid = hs ?
+   const uint32_t vs_primitiveid_regid = hs ?
          ir3_find_sysval_regid(hs, SYSTEM_VALUE_PRIMITIVE_ID) :
-         regid(63, 0);
-   const uint32_t vs_primitiveid_regid = gs ? gs_primitiveid_regid :
-      hs_primitiveid_regid;
+         gs_primitiveid_regid;
    const uint32_t ds_primitiveid_regid = ds ?
          ir3_find_sysval_regid(ds, SYSTEM_VALUE_PRIMITIVE_ID) :
          regid(63, 0);