arm64: dts: renesas: r8a774e1: Populate DU device node

Populate the DU device node properties in R8A774E1 SoC dtsi.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200812140217.24251-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index abaa6d7..4b57c1e 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -2623,22 +2623,39 @@
                };
 
                du: display@feb00000 {
+                       compatible = "renesas,du-r8a774e1";
                        reg = <0 0xfeb00000 0 0x80000>;
+                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 724>,
+                                <&cpg CPG_MOD 723>,
+                                <&cpg CPG_MOD 721>;
+                       clock-names = "du.0", "du.1", "du.3";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.3";
                        status = "disabled";
 
-                       /* placeholder */
+                       renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
 
                                port@0 {
                                        reg = <0>;
+                                       du_out_rgb: endpoint {
+                                       };
                                };
                                port@1 {
                                        reg = <1>;
+                                       du_out_hdmi0: endpoint {
+                                       };
                                };
                                port@2 {
                                        reg = <2>;
+                                       du_out_lvds0: endpoint {
+                                       };
                                };
                        };
                };